pwm: xilinx: Make use of devm_pwmchip_alloc() function
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Wed, 14 Feb 2024 09:33:17 +0000 (10:33 +0100)
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Thu, 22 Feb 2024 13:39:28 +0000 (14:39 +0100)
This prepares the pwm-xilinx driver to further changes of the pwm core
outlined in the commit introducing devm_pwmchip_alloc(). There is no
intended semantical change and the driver should behave as before.

Link: https://lore.kernel.org/r/7cbc32771e94103b8c1c817cfdd613d7a2fc01b9.1707900770.git.u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
drivers/pwm/pwm-xilinx.c

index 0ca79fe..3a7deeb 100644 (file)
@@ -80,15 +80,10 @@ unsigned int xilinx_timer_get_period(struct xilinx_timer_priv *priv,
 #define TCSR_PWM_CLEAR (TCSR_MDT | TCSR_LOAD)
 #define TCSR_PWM_MASK (TCSR_PWM_SET | TCSR_PWM_CLEAR)
 
-struct xilinx_pwm_device {
-       struct pwm_chip chip;
-       struct xilinx_timer_priv priv;
-};
-
 static inline struct xilinx_timer_priv
 *xilinx_pwm_chip_to_priv(struct pwm_chip *chip)
 {
-       return &container_of(chip, struct xilinx_pwm_device, chip)->priv;
+       return pwmchip_get_drvdata(chip);
 }
 
 static bool xilinx_timer_pwm_enabled(u32 tcsr0, u32 tcsr1)
@@ -215,7 +210,6 @@ static int xilinx_pwm_probe(struct platform_device *pdev)
        struct device_node *np = dev->of_node;
        struct xilinx_timer_priv *priv;
        struct pwm_chip *chip;
-       struct xilinx_pwm_device *xilinx_pwm;
        u32 pwm_cells, one_timer, width;
        void __iomem *regs;
 
@@ -226,11 +220,10 @@ static int xilinx_pwm_probe(struct platform_device *pdev)
        if (ret)
                return dev_err_probe(dev, ret, "could not read #pwm-cells\n");
 
-       xilinx_pwm = devm_kzalloc(dev, sizeof(*xilinx_pwm), GFP_KERNEL);
-       if (!xilinx_pwm)
-               return -ENOMEM;
-       priv = &xilinx_pwm->priv;
-       chip = &xilinx_pwm->chip;
+       chip = devm_pwmchip_alloc(dev, 1, sizeof(*priv));
+       if (IS_ERR(chip))
+               return PTR_ERR(chip);
+       priv = xilinx_pwm_chip_to_priv(chip);
        platform_set_drvdata(pdev, chip);
 
        regs = devm_platform_ioremap_resource(pdev, 0);
@@ -280,9 +273,7 @@ static int xilinx_pwm_probe(struct platform_device *pdev)
                return dev_err_probe(dev, ret, "Clock enable failed\n");
        clk_rate_exclusive_get(priv->clk);
 
-       chip->dev = dev;
        chip->ops = &xilinx_pwm_ops;
-       chip->npwm = 1;
        ret = pwmchip_add(chip);
        if (ret) {
                clk_rate_exclusive_put(priv->clk);