pinctrl: renesas: rzg2l: Remove OEN ops for RZ/G3E

The RZ/G3E pin controller does not advertise PIN_CFG_OEN capability, so
there is no valid mapping for output-enable bits on this SoC. Remove the
oen_read and oen_write callbacks from the RZ/G3E driver data to defer
OEN support until PIN_CFG_OEN support is added.

This is a preparatory change for future unification of OEN handling across
the driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250806195555.1372317-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 0245c65..3aa552e 100644 (file)
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -3344,8 +3344,6 @@ static struct rzg2l_pinctrl_data r9a09g047_data = {
 #endif
        .pwpr_pfc_lock_unlock = &rzv2h_pwpr_pfc_lock_unlock,
        .pmc_writeb = &rzv2h_pmc_writeb,
-       .oen_read = &rzv2h_oen_read,
-       .oen_write = &rzv2h_oen_write,
        .hw_to_bias_param = &rzv2h_hw_to_bias_param,
        .bias_param_to_hw = &rzv2h_bias_param_to_hw,
 };