IB/hfi1: Add bypass register defines and replace blind constants
authorMike Marciniszyn <mike.marciniszyn@intel.com>
Mon, 4 Jun 2018 18:43:21 +0000 (11:43 -0700)
committerJason Gunthorpe <jgg@mellanox.com>
Mon, 4 Jun 2018 20:59:21 +0000 (14:59 -0600)
These registers were not added in the 16B work.

Add them and replace blind constants with the correct defines.

Fixes: 72c07e2b671e ("IB/hfi1: Add support to receive 16B bypass packets")
Reviewed-by: Don Hiatt <don.hiatt@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/hfi1/chip.c
drivers/infiniband/hw/hfi1/chip_registers.h

index f75080d..6deb101 100644 (file)
@@ -14640,7 +14640,9 @@ static void init_rxe(struct hfi1_devdata *dd)
 
        /* Have 16 bytes (4DW) of bypass header available in header queue */
        val = read_csr(dd, RCV_BYPASS);
-       val |= (4ull << 16);
+       val &= ~RCV_BYPASS_HDR_SIZE_SMASK;
+       val |= ((4ull & RCV_BYPASS_HDR_SIZE_MASK) <<
+               RCV_BYPASS_HDR_SIZE_SHIFT);
        write_csr(dd, RCV_BYPASS, val);
 }
 
index da598b5..ee6dca5 100644 (file)
 #define RCV_BTH_QP_KDETH_QP_MASK 0xFFull
 #define RCV_BTH_QP_KDETH_QP_SHIFT 16
 #define RCV_BYPASS (RXE + 0x000000000038)
+#define RCV_BYPASS_HDR_SIZE_SHIFT 16
+#define RCV_BYPASS_HDR_SIZE_MASK 0x1Full
+#define RCV_BYPASS_HDR_SIZE_SMASK 0x1F0000ull
+#define RCV_BYPASS_BYPASS_CONTEXT_SHIFT 0
+#define RCV_BYPASS_BYPASS_CONTEXT_MASK 0xFFull
+#define RCV_BYPASS_BYPASS_CONTEXT_SMASK 0xFFull
 #define RCV_CONTEXTS (RXE + 0x000000000010)
 #define RCV_COUNTER_ARRAY32 (RXE + 0x000000000400)
 #define RCV_COUNTER_ARRAY64 (RXE + 0x000000000500)