clk: qcom: rpmh: Add CE clock on sdm845.
authorThara Gopinath <thara.gopinath@linaro.org>
Thu, 19 Nov 2020 15:52:29 +0000 (10:52 -0500)
committerStephen Boyd <sboyd@kernel.org>
Wed, 25 Nov 2020 02:05:13 +0000 (18:05 -0800)
Qualcomm CE clock resource that is managed by BCM is required
by crypto driver to access the core clock.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Link: https://lore.kernel.org/r/20201119155233.3974286-3-thara.gopinath@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/qcom/clk-rpmh.c

index e2c669b..7e2a4a9 100644 (file)
@@ -349,6 +349,7 @@ DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1);
 DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1);
 DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1);
 DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0");
+DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0");
 
 static struct clk_hw *sdm845_rpmh_clocks[] = {
        [RPMH_CXO_CLK]          = &sdm845_bi_tcxo.hw,
@@ -364,6 +365,7 @@ static struct clk_hw *sdm845_rpmh_clocks[] = {
        [RPMH_RF_CLK3]          = &sdm845_rf_clk3.hw,
        [RPMH_RF_CLK3_A]        = &sdm845_rf_clk3_ao.hw,
        [RPMH_IPA_CLK]          = &sdm845_ipa.hw,
+       [RPMH_CE_CLK]           = &sdm845_ce.hw,
 };
 
 static const struct clk_rpmh_desc clk_rpmh_sdm845 = {