drm/ingenic: Add support for 24-bit modes
authorPaul Cercueil <paul@crapouillou.net>
Sat, 26 Sep 2020 17:05:01 +0000 (19:05 +0200)
committerPaul Cercueil <paul@crapouillou.net>
Sat, 26 Sep 2020 19:56:04 +0000 (21:56 +0200)
Starting from the JZ4725B SoC, the primary and overlay planes support
24-bit pixel modes (8 bits per color component, without dummy byte).
Add support for these in the ingenic-drm driver.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-8-paul@crapouillou.net
drivers/gpu/drm/ingenic/ingenic-drm-drv.c
drivers/gpu/drm/ingenic/ingenic-drm.h

index b568137..589fc0c 100644 (file)
@@ -455,6 +455,9 @@ void ingenic_drm_plane_config(struct device *dev,
                case DRM_FORMAT_RGB565:
                        ctrl |= JZ_LCD_OSDCTRL_BPP_15_16;
                        break;
+               case DRM_FORMAT_RGB888:
+                       ctrl |= JZ_LCD_OSDCTRL_BPP_24_COMP;
+                       break;
                case DRM_FORMAT_XRGB8888:
                        ctrl |= JZ_LCD_OSDCTRL_BPP_18_24;
                        break;
@@ -473,6 +476,9 @@ void ingenic_drm_plane_config(struct device *dev,
                case DRM_FORMAT_RGB565:
                        ctrl |= JZ_LCD_CTRL_BPP_15_16;
                        break;
+               case DRM_FORMAT_RGB888:
+                       ctrl |= JZ_LCD_CTRL_BPP_24_COMP;
+                       break;
                case DRM_FORMAT_XRGB8888:
                        ctrl |= JZ_LCD_CTRL_BPP_18_24;
                        break;
@@ -1227,6 +1233,7 @@ static const u32 jz4725b_formats_f0[] = {
 static const u32 jz4770_formats_f1[] = {
        DRM_FORMAT_XRGB1555,
        DRM_FORMAT_RGB565,
+       DRM_FORMAT_RGB888,
        DRM_FORMAT_XRGB8888,
        DRM_FORMAT_XRGB2101010,
 };
@@ -1234,6 +1241,7 @@ static const u32 jz4770_formats_f1[] = {
 static const u32 jz4770_formats_f0[] = {
        DRM_FORMAT_XRGB1555,
        DRM_FORMAT_RGB565,
+       DRM_FORMAT_RGB888,
        DRM_FORMAT_XRGB8888,
        DRM_FORMAT_XRGB2101010,
 };
index f05e18e..ee3a892 100644 (file)
 #define JZ_LCD_CTRL_BPP_8                      0x3
 #define JZ_LCD_CTRL_BPP_15_16                  0x4
 #define JZ_LCD_CTRL_BPP_18_24                  0x5
+#define JZ_LCD_CTRL_BPP_24_COMP                        0x6
 #define JZ_LCD_CTRL_BPP_30                     0x7
 #define JZ_LCD_CTRL_BPP_MASK                   (JZ_LCD_CTRL_RGB555 | 0x7)
 
 #define JZ_LCD_OSDCTRL_CHANGE                  BIT(3)
 #define JZ_LCD_OSDCTRL_BPP_15_16               0x4
 #define JZ_LCD_OSDCTRL_BPP_18_24               0x5
+#define JZ_LCD_OSDCTRL_BPP_24_COMP             0x6
 #define JZ_LCD_OSDCTRL_BPP_30                  0x7
 #define JZ_LCD_OSDCTRL_BPP_MASK                        (JZ_LCD_OSDCTRL_RGB555 | 0x7)