drm/i915/gvt: Make WARN* drm specific where drm_priv ptr is available

drm specific WARN* calls include device information in the
backtrace, so we know what device the warnings originate from.

Covert all the calls of WARN* with device specific drm_WARN*
variants in functions where drm_i915_private struct pointer is
readily available.

The conversion was done automatically with below coccinelle semantic
patch. checkpatch errors/warnings are fixed manually.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20200220165507.16823-8-pankaj.laxminarayan.bharadiya@intel.com

diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 7714204..29eed84 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -134,11 +134,11 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
 
        assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
-       if (WARN_ON(fence >= vgpu_fence_sz(vgpu)))
+       if (drm_WARN_ON(&dev_priv->drm, fence >= vgpu_fence_sz(vgpu)))
                return;
 
        reg = vgpu->fence.regs[fence];
-       if (WARN_ON(!reg))
+       if (drm_WARN_ON(&dev_priv->drm, !reg))
                return;
 
        fence_reg_lo = FENCE_REG_GEN6_LO(reg->id);
@@ -167,7 +167,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
        struct i915_fence_reg *reg;
        u32 i;
 
-       if (WARN_ON(!vgpu_fence_sz(vgpu)))
+       if (drm_WARN_ON(&dev_priv->drm, !vgpu_fence_sz(vgpu)))
                return;
 
        intel_runtime_pm_get(&dev_priv->runtime_pm);

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index 21a176c..73a2891 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -1230,7 +1230,7 @@ static int gen8_decode_mi_display_flip(struct parser_exec_state *s,
        dword2 = cmd_val(s, 2);
 
        v = (dword0 & GENMASK(21, 19)) >> 19;
-       if (WARN_ON(v >= ARRAY_SIZE(gen8_plane_code)))
+       if (drm_WARN_ON(&dev_priv->drm, v >= ARRAY_SIZE(gen8_plane_code)))
                return -EBADRQC;
 
        info->pipe = gen8_plane_code[v].pipe;
@@ -1250,7 +1250,7 @@ static int gen8_decode_mi_display_flip(struct parser_exec_state *s,
                info->stride_reg = SPRSTRIDE(info->pipe);
                info->surf_reg = SPRSURF(info->pipe);
        } else {
-               WARN_ON(1);
+               drm_WARN_ON(&dev_priv->drm, 1);
                return -EBADRQC;
        }
        return 0;

diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index e1c313d..9a9329f 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -71,7 +71,8 @@ int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe)
 {
        struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
 
-       if (WARN_ON(pipe < PIPE_A || pipe >= I915_MAX_PIPES))
+       if (drm_WARN_ON(&dev_priv->drm,
+                       pipe < PIPE_A || pipe >= I915_MAX_PIPES))
                return -EINVAL;
 
        if (vgpu_vreg_t(vgpu, PIPECONF(pipe)) & PIPECONF_ENABLE)

diff --git a/drivers/gpu/drm/i915/gvt/dmabuf.c b/drivers/gpu/drm/i915/gvt/dmabuf.c
index 2477a1e..b854bd2 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/dmabuf.c
+++ b/drivers/gpu/drm/i915/gvt/dmabuf.c
@@ -67,11 +67,11 @@ static int vgpu_gem_get_pages(
        u32 page_num;
 
        fb_info = (struct intel_vgpu_fb_info *)obj->gvt_info;
-       if (WARN_ON(!fb_info))
+       if (drm_WARN_ON(&dev_priv->drm, !fb_info))
                return -ENODEV;
 
        vgpu = fb_info->obj->vgpu;
-       if (WARN_ON(!vgpu))
+       if (drm_WARN_ON(&dev_priv->drm, !vgpu))
                return -ENODEV;
 
        st = kmalloc(sizeof(*st), GFP_KERNEL);

diff --git a/drivers/gpu/drm/i915/gvt/edid.c b/drivers/gpu/drm/i915/gvt/edid.c
index 1fe6124..97bf758 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/edid.c
+++ b/drivers/gpu/drm/i915/gvt/edid.c
@@ -153,7 +153,7 @@ static int gmbus0_mmio_write(struct intel_vgpu *vgpu,
                port = cnp_get_port_from_gmbus0(pin_select);
        else
                port = get_port_from_gmbus0(pin_select);
-       if (WARN_ON(port < 0))
+       if (drm_WARN_ON(&dev_priv->drm, port < 0))
                return 0;
 
        vgpu->display.i2c_edid.state = I2C_GMBUS;

diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c
index cb5fa30..87bed32 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gvt.c
+++ b/drivers/gpu/drm/i915/gvt/gvt.c
@@ -265,7 +265,7 @@ void intel_gvt_clean_device(struct drm_i915_private *dev_priv)
 {
        struct intel_gvt *gvt = to_gvt(dev_priv);
 
-       if (WARN_ON(!gvt))
+       if (drm_WARN_ON(&dev_priv->drm, !gvt))
                return;
 
        intel_gvt_destroy_idle_vgpu(gvt->idle_vgpu);
@@ -304,7 +304,7 @@ int intel_gvt_init_device(struct drm_i915_private *dev_priv)
        struct intel_vgpu *vgpu;
        int ret;
 
-       if (WARN_ON(dev_priv->gvt))
+       if (drm_WARN_ON(&dev_priv->drm, dev_priv->gvt))
                return -EEXIST;
 
        gvt = kzalloc(sizeof(struct intel_gvt), GFP_KERNEL);

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index ae6700d..288572e 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -836,7 +836,7 @@ static int trigger_aux_channel_interrupt(struct intel_vgpu *vgpu,
                 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_D)))
                event = AUX_CHANNEL_D;
        else {
-               WARN_ON(true);
+               drm_WARN_ON(&dev_priv->drm, true);
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index aaf1591..a4a1de3 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -357,7 +357,7 @@ static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id)
        if (!regs)
                return;
 
-       if (WARN_ON(ring_id >= cnt))
+       if (drm_WARN_ON(&dev_priv->drm, ring_id >= cnt))
                return;
 
        if (!test_and_clear_bit(ring_id, (void *)s->tlb_handle_pending))