Merge patch series "riscv: Unaligned access speed probing fixes and skipping"
authorAlexandre Ghiti <alexghiti@rivosinc.com>
Wed, 19 Mar 2025 14:23:50 +0000 (14:23 +0000)
committerAlexandre Ghiti <alexghiti@rivosinc.com>
Thu, 20 Mar 2025 07:25:24 +0000 (07:25 +0000)
Andrew Jones <ajones@ventanamicro.com> says:

The first six patches of this series are fixes and cleanups of the
unaligned access speed probing code. The next patch introduces a
kernel command line option that allows the probing to be skipped.
This command line option is a different approach than Jesse's [1].
[1] takes a cpu-list for a particular speed, supporting heterogeneous
platforms. With this approach, the kernel command line should only
be used for homogeneous platforms. [1] also only allowed 'fast' and
'slow' to be selected. This parameter also supports 'unsupported',
which could be useful for testing code paths gated on that. The final
patch adds the documentation.

[1] https://lore.kernel.org/linux-riscv/20240805173816.3722002-1-jesse@rivosinc.com/

* patches from https://lore.kernel.org/r/20250304120014.143628-10-ajones@ventanamicro.com:
  Documentation/kernel-parameters: Add riscv unaligned speed parameters
  riscv: Add parameter for skipping access speed tests
  riscv: Fix set up of vector cpu hotplug callback
  riscv: Fix set up of cpu hotplug callbacks
  riscv: Change check_unaligned_access_speed_all_cpus to void
  riscv: Fix check_unaligned_access_all_cpus
  riscv: Fix riscv_online_cpu_vec
  riscv: Annotate unaligned access init functions

Link: https://lore.kernel.org/r/20250304120014.143628-10-ajones@ventanamicro.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
1  2 
arch/riscv/kernel/unaligned_access_speed.c

@@@ -363,17 -366,31 +366,34 @@@ static void check_vector_unaligned_acce
                (speed ==  RISCV_HWPROBE_MISALIGNED_VECTOR_FAST) ? "fast" : "slow");
  
        per_cpu(vector_misaligned_access, cpu) = speed;
 +
 +free:
 +      __free_pages(page, MISALIGNED_BUFFER_ORDER);
  }
  
+ /* Measure unaligned access speed on all CPUs present at boot in parallel. */
+ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused)
+ {
+       schedule_on_each_cpu(check_vector_unaligned_access);
+       return 0;
+ }
+ #else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */
+ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused)
+ {
+       return 0;
+ }
+ #endif
  static int riscv_online_cpu_vec(unsigned int cpu)
  {
-       if (!has_vector())
+       if (unaligned_vector_speed_param != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) {
+               per_cpu(vector_misaligned_access, cpu) = unaligned_vector_speed_param;
                return 0;
+       }
  
-       if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED)
+ #ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS
+       if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN)
                return 0;
  
        check_vector_unaligned_access_emulated(NULL);