crypto: caam - mark the hardware descriptor as cache line aligned
authorRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 8 Aug 2016 17:04:47 +0000 (18:04 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Tue, 9 Aug 2016 10:47:24 +0000 (18:47 +0800)
Mark the hardware descriptor as being cache line aligned; on DMA
incoherent architectures, the hardware descriptor should sit in a
separate cache line from the CPU accessed data to avoid polluting
the caches.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/caam/caamhash.c

index 683a945..faf3d1b 100644 (file)
@@ -604,7 +604,7 @@ struct ahash_edesc {
        int src_nents;
        int sec4_sg_bytes;
        struct sec4_sg_entry *sec4_sg;
-       u32 hw_desc[DESC_JOB_IO_LEN / sizeof(u32)];
+       u32 hw_desc[DESC_JOB_IO_LEN / sizeof(u32)] ____cacheline_aligned;
 };
 
 static inline void ahash_unmap(struct device *dev,