arm64: dts: imx8: Fix lvds0 device tree
authorDiogo Silva <diogompaissilva@gmail.com>
Tue, 17 Sep 2024 06:58:01 +0000 (08:58 +0200)
committerShawn Guo <shawnguo@kernel.org>
Wed, 16 Oct 2024 08:42:20 +0000 (16:42 +0800)
Some clock output names on lvds0 device tree were duplicated from mipi1,
which caused an -EEXIST when registering these clocks during probe.

Fixes: 0fba24b3b956 ("arm64: dts: imx8: add basic lvds0 and lvds1 subsystem")
Signed-off-by: Diogo Silva <diogompaissilva@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi

index d000362..dad0dc8 100644 (file)
@@ -14,7 +14,7 @@ lvds0_subsys: bus@56240000 {
                compatible = "fsl,imx8qxp-lpcg";
                reg = <0x56243000 0x4>;
                #clock-cells = <1>;
-               clock-output-names = "mipi1_lis_lpcg_ipg_clk";
+               clock-output-names = "lvds0_lis_lpcg_ipg_clk";
                power-domains = <&pd IMX_SC_R_MIPI_1>;
        };
 
@@ -22,9 +22,9 @@ lvds0_subsys: bus@56240000 {
                compatible = "fsl,imx8qxp-lpcg";
                reg = <0x5624300c 0x4>;
                #clock-cells = <1>;
-               clock-output-names = "mipi1_pwm_lpcg_clk",
-                                    "mipi1_pwm_lpcg_ipg_clk",
-                                    "mipi1_pwm_lpcg_32k_clk";
+               clock-output-names = "lvds0_pwm_lpcg_clk",
+                                    "lvds0_pwm_lpcg_ipg_clk",
+                                    "lvds0_pwm_lpcg_32k_clk";
                power-domains = <&pd IMX_SC_R_MIPI_1_PWM_0>;
        };
 
@@ -32,8 +32,8 @@ lvds0_subsys: bus@56240000 {
                compatible = "fsl,imx8qxp-lpcg";
                reg = <0x56243010 0x4>;
                #clock-cells = <1>;
-               clock-output-names = "mipi1_i2c0_lpcg_clk",
-                                    "mipi1_i2c0_lpcg_ipg_clk";
+               clock-output-names = "lvds0_i2c0_lpcg_clk",
+                                    "lvds0_i2c0_lpcg_ipg_clk";
                power-domains = <&pd IMX_SC_R_MIPI_1_I2C_0>;
        };