arm64: dts: sdm845: Add dynamic CPU power coefficients

Add dynamic power coefficients for the Silver and Gold CPU cores of
the Qualcomm SDM845.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 9be6acb..e285cbd 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -194,6 +194,7 @@
                                           &LITTLE_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
                        capacity-dmips-mhz = <607>;
+                       dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_0>;
@@ -215,6 +216,7 @@
                                           &LITTLE_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
                        capacity-dmips-mhz = <607>;
+                       dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_100>;
@@ -233,6 +235,7 @@
                                           &LITTLE_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
                        capacity-dmips-mhz = <607>;
+                       dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_200>;
@@ -251,6 +254,7 @@
                                           &LITTLE_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
                        capacity-dmips-mhz = <607>;
+                       dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_300>;
@@ -269,6 +273,7 @@
                        cpu-idle-states = <&BIG_CPU_SLEEP_0
                                           &BIG_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
+                       dynamic-power-coefficient = <396>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_400>;
@@ -287,6 +292,7 @@
                        cpu-idle-states = <&BIG_CPU_SLEEP_0
                                           &BIG_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
+                       dynamic-power-coefficient = <396>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_500>;
@@ -305,6 +311,7 @@
                        cpu-idle-states = <&BIG_CPU_SLEEP_0
                                           &BIG_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
+                       dynamic-power-coefficient = <396>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_600>;
@@ -323,6 +330,7 @@
                        cpu-idle-states = <&BIG_CPU_SLEEP_0
                                           &BIG_CPU_SLEEP_1
                                           &CLUSTER_SLEEP_0>;
+                       dynamic-power-coefficient = <396>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
                        next-level-cache = <&L2_700>;