pinctrl: renesas: rzg2l: Add pin configuration support for pinmux groups

On RZ/G3S different Ethernet pins need to be configured with different
settings (e.g. power-source needs to be set, RGMII TXC and TX_CTL pins
need output-enable).  Adjust the driver to allow specifying pin
configuration for pinmux groups.  With this, DT settings like the
following are taken into account by the driver:

    eth0_pins: eth0 {
	    tx_ctl {
		    pinmux = <RZG2L_PORT_PINMUX(1, 1, 1)>;  /* ET0_TX_CTL */
		    power-source = <1800>;
		    output-enable;
		    drive-strength-microamp = <5200>;
	    };
    };

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231207070700.4156557-5-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 413ef97..b272963 100644 (file)
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -376,8 +376,11 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
                goto done;
        }
 
-       if (num_pinmux)
+       if (num_pinmux) {
                nmaps += 1;
+               if (num_configs)
+                       nmaps += 1;
+       }
 
        if (num_pins)
                nmaps += num_pins;
@@ -462,6 +465,16 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
        maps[idx].data.mux.function = name;
        idx++;
 
+       if (num_configs) {
+               ret = rzg2l_map_add_config(&maps[idx], name,
+                                          PIN_MAP_TYPE_CONFIGS_GROUP,
+                                          configs, num_configs);
+               if (ret < 0)
+                       goto remove_group;
+
+               idx++;
+       }
+
        dev_dbg(pctrl->dev, "Parsed %pOF with %d pins\n", np, num_pinmux);
        ret = 0;
        goto done;