drm/amdgpu: export vm update mapping interface
authorPhilip Yang <Philip.Yang@amd.com>
Mon, 23 Sep 2019 15:53:08 +0000 (11:53 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 21 Apr 2021 01:47:13 +0000 (21:47 -0400)
It will be used by kfd to map svm range to GPU, because svm range does
not have amdgpu_bo and bo_va, cannot use amdgpu_bo_update interface, use
amdgpu vm update interface directly.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

index 0ffdf84..2dd5b0e 100644 (file)
@@ -1592,15 +1592,15 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
  * Returns:
  * 0 for success, -EINVAL for failure.
  */
-static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
-                                      struct amdgpu_device *bo_adev,
-                                      struct amdgpu_vm *vm, bool immediate,
-                                      bool unlocked, struct dma_resv *resv,
-                                      uint64_t start, uint64_t last,
-                                      uint64_t flags, uint64_t offset,
-                                      struct drm_mm_node *nodes,
-                                      dma_addr_t *pages_addr,
-                                      struct dma_fence **fence)
+int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
+                               struct amdgpu_device *bo_adev,
+                               struct amdgpu_vm *vm, bool immediate,
+                               bool unlocked, struct dma_resv *resv,
+                               uint64_t start, uint64_t last,
+                               uint64_t flags, uint64_t offset,
+                               struct drm_mm_node *nodes,
+                               dma_addr_t *pages_addr,
+                               struct dma_fence **fence)
 {
        struct amdgpu_vm_update_params params;
        enum amdgpu_sync_mode sync_mode;
index 976a12e..848e175 100644 (file)
@@ -366,6 +366,8 @@ struct amdgpu_vm_manager {
        spinlock_t                              pasid_lock;
 };
 
+struct amdgpu_bo_va_mapping;
+
 #define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib), (pe), (src), (count)))
 #define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr)))
 #define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_funcs->set_pte_pde((ib), (pe), (addr), (count), (incr), (flags)))
@@ -397,6 +399,15 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
                          struct dma_fence **fence);
 int amdgpu_vm_handle_moved(struct amdgpu_device *adev,
                           struct amdgpu_vm *vm);
+int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
+                               struct amdgpu_device *bo_adev,
+                               struct amdgpu_vm *vm, bool immediate,
+                               bool unlocked, struct dma_resv *resv,
+                               uint64_t start, uint64_t last,
+                               uint64_t flags, uint64_t offset,
+                               struct drm_mm_node *nodes,
+                               dma_addr_t *pages_addr,
+                               struct dma_fence **fence);
 int amdgpu_vm_bo_update(struct amdgpu_device *adev,
                        struct amdgpu_bo_va *bo_va,
                        bool clear);