wifi: iwlwifi: pcie: fix a few legacy register accesses for new devices
authorEmmanuel Grumbach <emmanuel.grumbach@intel.com>
Tue, 18 Jun 2024 17:03:01 +0000 (20:03 +0300)
committerJohannes Berg <johannes.berg@intel.com>
Wed, 26 Jun 2024 08:28:21 +0000 (10:28 +0200)
Do not access legacy bits for new devices, this has no effect.
Somehow, wowlan worked despite the usage of the wrong bits. Now
that we want to keep the firmware loaded during suspend even without
wowlan, this change is needed.

Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20240618200104.399d4d215210.Id12e7fdb7bab9f2c4c0d292519b5c1b4753a8c84@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
drivers/net/wireless/intel/iwlwifi/iwl-io.c
drivers/net/wireless/intel/iwlwifi/pcie/trans.c

index c60f946..060becf 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
 /*
- * Copyright (C) 2003-2014, 2018-2022 Intel Corporation
+ * Copyright (C) 2003-2014, 2018-2022, 2024 Intel Corporation
  * Copyright (C) 2015-2016 Intel Deutschland GmbH
  */
 #include <linux/delay.h>
@@ -460,7 +460,7 @@ int iwl_finish_nic_init(struct iwl_trans *trans)
         */
        if (cfg_trans->device_family >= IWL_DEVICE_FAMILY_BZ) {
                iwl_set_bit(trans, CSR_GP_CNTRL,
-                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
+                           CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ |
                            CSR_GP_CNTRL_REG_FLAG_MAC_INIT);
                poll_ready = CSR_GP_CNTRL_REG_FLAG_MAC_STATUS;
        } else {
index 94502e0..719ddc4 100644 (file)
@@ -1504,9 +1504,17 @@ void iwl_pcie_d3_complete_suspend(struct iwl_trans *trans,
 
        iwl_pcie_synchronize_irqs(trans);
 
-       iwl_clear_bit(trans, CSR_GP_CNTRL,
-                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
-       iwl_clear_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
+       if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
+               iwl_clear_bit(trans, CSR_GP_CNTRL,
+                             CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
+               iwl_clear_bit(trans, CSR_GP_CNTRL,
+                             CSR_GP_CNTRL_REG_FLAG_MAC_INIT);
+       } else {
+               iwl_clear_bit(trans, CSR_GP_CNTRL,
+                             CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
+               iwl_clear_bit(trans, CSR_GP_CNTRL,
+                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
+       }
 
        if (reset) {
                /*
@@ -1584,8 +1592,12 @@ int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
                goto out;
        }
 
-       iwl_set_bit(trans, CSR_GP_CNTRL,
-                   CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
+       if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
+               iwl_set_bit(trans, CSR_GP_CNTRL,
+                           CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
+       else
+               iwl_set_bit(trans, CSR_GP_CNTRL,
+                           CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 
        ret = iwl_finish_nic_init(trans);
        if (ret)