perf/x86/intel: Switch to new Intel CPU model defines

New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/all/20240520224620.9480-32-tony.luck%40intel.com

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 38c1b1f..7f7f1c3 100644 (file)
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4698,8 +4698,8 @@ static void intel_pmu_check_extra_regs(struct extra_reg *extra_regs);
 static inline bool intel_pmu_broken_perf_cap(void)
 {
        /* The Perf Metric (Bit 15) is always cleared */
-       if ((boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE) ||
-           (boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE_L))
+       if (boot_cpu_data.x86_vfm == INTEL_METEORLAKE ||
+           boot_cpu_data.x86_vfm == INTEL_METEORLAKE_L)
                return true;
 
        return false;
@@ -6238,19 +6238,19 @@ __init int intel_pmu_init(void)
        /*
         * Install the hw-cache-events table:
         */
-       switch (boot_cpu_data.x86_model) {
-       case INTEL_FAM6_CORE_YONAH:
+       switch (boot_cpu_data.x86_vfm) {
+       case INTEL_CORE_YONAH:
                pr_cont("Core events, ");
                name = "core";
                break;
 
-       case INTEL_FAM6_CORE2_MEROM:
+       case INTEL_CORE2_MEROM:
                x86_add_quirk(intel_clovertown_quirk);
                fallthrough;
 
-       case INTEL_FAM6_CORE2_MEROM_L:
-       case INTEL_FAM6_CORE2_PENRYN:
-       case INTEL_FAM6_CORE2_DUNNINGTON:
+       case INTEL_CORE2_MEROM_L:
+       case INTEL_CORE2_PENRYN:
+       case INTEL_CORE2_DUNNINGTON:
                memcpy(hw_cache_event_ids, core2_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
 
@@ -6262,9 +6262,9 @@ __init int intel_pmu_init(void)
                name = "core2";
                break;
 
-       case INTEL_FAM6_NEHALEM:
-       case INTEL_FAM6_NEHALEM_EP:
-       case INTEL_FAM6_NEHALEM_EX:
+       case INTEL_NEHALEM:
+       case INTEL_NEHALEM_EP:
+       case INTEL_NEHALEM_EX:
                memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
                memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs,
@@ -6296,11 +6296,11 @@ __init int intel_pmu_init(void)
                name = "nehalem";
                break;
 
-       case INTEL_FAM6_ATOM_BONNELL:
-       case INTEL_FAM6_ATOM_BONNELL_MID:
-       case INTEL_FAM6_ATOM_SALTWELL:
-       case INTEL_FAM6_ATOM_SALTWELL_MID:
-       case INTEL_FAM6_ATOM_SALTWELL_TABLET:
+       case INTEL_ATOM_BONNELL:
+       case INTEL_ATOM_BONNELL_MID:
+       case INTEL_ATOM_SALTWELL:
+       case INTEL_ATOM_SALTWELL_MID:
+       case INTEL_ATOM_SALTWELL_TABLET:
                memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
 
@@ -6313,11 +6313,11 @@ __init int intel_pmu_init(void)
                name = "bonnell";
                break;
 
-       case INTEL_FAM6_ATOM_SILVERMONT:
-       case INTEL_FAM6_ATOM_SILVERMONT_D:
-       case INTEL_FAM6_ATOM_SILVERMONT_MID:
-       case INTEL_FAM6_ATOM_AIRMONT:
-       case INTEL_FAM6_ATOM_AIRMONT_MID:
+       case INTEL_ATOM_SILVERMONT:
+       case INTEL_ATOM_SILVERMONT_D:
+       case INTEL_ATOM_SILVERMONT_MID:
+       case INTEL_ATOM_AIRMONT:
+       case INTEL_ATOM_AIRMONT_MID:
                memcpy(hw_cache_event_ids, slm_hw_cache_event_ids,
                        sizeof(hw_cache_event_ids));
                memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs,
@@ -6335,8 +6335,8 @@ __init int intel_pmu_init(void)
                name = "silvermont";
                break;
 
-       case INTEL_FAM6_ATOM_GOLDMONT:
-       case INTEL_FAM6_ATOM_GOLDMONT_D:
+       case INTEL_ATOM_GOLDMONT:
+       case INTEL_ATOM_GOLDMONT_D:
                memcpy(hw_cache_event_ids, glm_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
                memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs,
@@ -6362,7 +6362,7 @@ __init int intel_pmu_init(void)
                name = "goldmont";
                break;
 
-       case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+       case INTEL_ATOM_GOLDMONT_PLUS:
                memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
                memcpy(hw_cache_extra_regs, glp_hw_cache_extra_regs,
@@ -6391,9 +6391,9 @@ __init int intel_pmu_init(void)
                name = "goldmont_plus";
                break;
 
-       case INTEL_FAM6_ATOM_TREMONT_D:
-       case INTEL_FAM6_ATOM_TREMONT:
-       case INTEL_FAM6_ATOM_TREMONT_L:
+       case INTEL_ATOM_TREMONT_D:
+       case INTEL_ATOM_TREMONT:
+       case INTEL_ATOM_TREMONT_L:
                x86_pmu.late_ack = true;
                memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
@@ -6420,7 +6420,7 @@ __init int intel_pmu_init(void)
                name = "Tremont";
                break;
 
-       case INTEL_FAM6_ATOM_GRACEMONT:
+       case INTEL_ATOM_GRACEMONT:
                intel_pmu_init_grt(NULL);
                intel_pmu_pebs_data_source_grt();
                x86_pmu.pebs_latency_data = adl_latency_data_small;
@@ -6432,8 +6432,8 @@ __init int intel_pmu_init(void)
                name = "gracemont";
                break;
 
-       case INTEL_FAM6_ATOM_CRESTMONT:
-       case INTEL_FAM6_ATOM_CRESTMONT_X:
+       case INTEL_ATOM_CRESTMONT:
+       case INTEL_ATOM_CRESTMONT_X:
                intel_pmu_init_grt(NULL);
                x86_pmu.extra_regs = intel_cmt_extra_regs;
                intel_pmu_pebs_data_source_cmt();
@@ -6446,9 +6446,9 @@ __init int intel_pmu_init(void)
                name = "crestmont";
                break;
 
-       case INTEL_FAM6_WESTMERE:
-       case INTEL_FAM6_WESTMERE_EP:
-       case INTEL_FAM6_WESTMERE_EX:
+       case INTEL_WESTMERE:
+       case INTEL_WESTMERE_EP:
+       case INTEL_WESTMERE_EX:
                memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
                memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs,
@@ -6477,8 +6477,8 @@ __init int intel_pmu_init(void)
                name = "westmere";
                break;
 
-       case INTEL_FAM6_SANDYBRIDGE:
-       case INTEL_FAM6_SANDYBRIDGE_X:
+       case INTEL_SANDYBRIDGE:
+       case INTEL_SANDYBRIDGE_X:
                x86_add_quirk(intel_sandybridge_quirk);
                x86_add_quirk(intel_ht_bug);
                memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
@@ -6491,7 +6491,7 @@ __init int intel_pmu_init(void)
                x86_pmu.event_constraints = intel_snb_event_constraints;
                x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints;
                x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
-               if (boot_cpu_data.x86_model == INTEL_FAM6_SANDYBRIDGE_X)
+               if (boot_cpu_data.x86_vfm == INTEL_SANDYBRIDGE_X)
                        x86_pmu.extra_regs = intel_snbep_extra_regs;
                else
                        x86_pmu.extra_regs = intel_snb_extra_regs;
@@ -6517,8 +6517,8 @@ __init int intel_pmu_init(void)
                name = "sandybridge";
                break;
 
-       case INTEL_FAM6_IVYBRIDGE:
-       case INTEL_FAM6_IVYBRIDGE_X:
+       case INTEL_IVYBRIDGE:
+       case INTEL_IVYBRIDGE_X:
                x86_add_quirk(intel_ht_bug);
                memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
                       sizeof(hw_cache_event_ids));
@@ -6534,7 +6534,7 @@ __init int intel_pmu_init(void)
                x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints;
                x86_pmu.pebs_aliases = intel_pebs_aliases_ivb;
                x86_pmu.pebs_prec_dist = true;
-               if (boot_cpu_data.x86_model == INTEL_FAM6_IVYBRIDGE_X)
+               if (boot_cpu_data.x86_vfm == INTEL_IVYBRIDGE_X)
                        x86_pmu.extra_regs = intel_snbep_extra_regs;
                else
                        x86_pmu.extra_regs = intel_snb_extra_regs;
@@ -6556,10 +6556,10 @@ __init int intel_pmu_init(void)
                break;
 
 
-       case INTEL_FAM6_HASWELL:
-       case INTEL_FAM6_HASWELL_X:
-       case INTEL_FAM6_HASWELL_L:
-       case INTEL_FAM6_HASWELL_G:
+       case INTEL_HASWELL:
+       case INTEL_HASWELL_X:
+       case INTEL_HASWELL_L:
+       case INTEL_HASWELL_G:
                x86_add_quirk(intel_ht_bug);
                x86_add_quirk(intel_pebs_isolation_quirk);
                x86_pmu.late_ack = true;
@@ -6589,10 +6589,10 @@ __init int intel_pmu_init(void)
                name = "haswell";
                break;
 
-       case INTEL_FAM6_BROADWELL:
-       case INTEL_FAM6_BROADWELL_D:
-       case INTEL_FAM6_BROADWELL_G:
-       case INTEL_FAM6_BROADWELL_X:
+       case INTEL_BROADWELL:
+       case INTEL_BROADWELL_D:
+       case INTEL_BROADWELL_G:
+       case INTEL_BROADWELL_X:
                x86_add_quirk(intel_pebs_isolation_quirk);
                x86_pmu.late_ack = true;
                memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids));
@@ -6631,8 +6631,8 @@ __init int intel_pmu_init(void)
                name = "broadwell";
                break;
 
-       case INTEL_FAM6_XEON_PHI_KNL:
-       case INTEL_FAM6_XEON_PHI_KNM:
+       case INTEL_XEON_PHI_KNL:
+       case INTEL_XEON_PHI_KNM:
                memcpy(hw_cache_event_ids,
                       slm_hw_cache_event_ids, sizeof(hw_cache_event_ids));
                memcpy(hw_cache_extra_regs,
@@ -6651,15 +6651,15 @@ __init int intel_pmu_init(void)
                name = "knights-landing";
                break;
 
-       case INTEL_FAM6_SKYLAKE_X:
+       case INTEL_SKYLAKE_X:
                pmem = true;
                fallthrough;
-       case INTEL_FAM6_SKYLAKE_L:
-       case INTEL_FAM6_SKYLAKE:
-       case INTEL_FAM6_KABYLAKE_L:
-       case INTEL_FAM6_KABYLAKE:
-       case INTEL_FAM6_COMETLAKE_L:
-       case INTEL_FAM6_COMETLAKE:
+       case INTEL_SKYLAKE_L:
+       case INTEL_SKYLAKE:
+       case INTEL_KABYLAKE_L:
+       case INTEL_KABYLAKE:
+       case INTEL_COMETLAKE_L:
+       case INTEL_COMETLAKE:
                x86_add_quirk(intel_pebs_isolation_quirk);
                x86_pmu.late_ack = true;
                memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
@@ -6708,16 +6708,16 @@ __init int intel_pmu_init(void)
                name = "skylake";
                break;
 
-       case INTEL_FAM6_ICELAKE_X:
-       case INTEL_FAM6_ICELAKE_D:
+       case INTEL_ICELAKE_X:
+       case INTEL_ICELAKE_D:
                x86_pmu.pebs_ept = 1;
                pmem = true;
                fallthrough;
-       case INTEL_FAM6_ICELAKE_L:
-       case INTEL_FAM6_ICELAKE:
-       case INTEL_FAM6_TIGERLAKE_L:
-       case INTEL_FAM6_TIGERLAKE:
-       case INTEL_FAM6_ROCKETLAKE:
+       case INTEL_ICELAKE_L:
+       case INTEL_ICELAKE:
+       case INTEL_TIGERLAKE_L:
+       case INTEL_TIGERLAKE:
+       case INTEL_ROCKETLAKE:
                x86_pmu.late_ack = true;
                memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
                memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
@@ -6752,13 +6752,13 @@ __init int intel_pmu_init(void)
                name = "icelake";
                break;
 
-       case INTEL_FAM6_SAPPHIRERAPIDS_X:
-       case INTEL_FAM6_EMERALDRAPIDS_X:
+       case INTEL_SAPPHIRERAPIDS_X:
+       case INTEL_EMERALDRAPIDS_X:
                x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX;
                x86_pmu.extra_regs = intel_glc_extra_regs;
                fallthrough;
-       case INTEL_FAM6_GRANITERAPIDS_X:
-       case INTEL_FAM6_GRANITERAPIDS_D:
+       case INTEL_GRANITERAPIDS_X:
+       case INTEL_GRANITERAPIDS_D:
                intel_pmu_init_glc(NULL);
                if (!x86_pmu.extra_regs)
                        x86_pmu.extra_regs = intel_rwc_extra_regs;
@@ -6776,11 +6776,11 @@ __init int intel_pmu_init(void)
                name = "sapphire_rapids";
                break;
 
-       case INTEL_FAM6_ALDERLAKE:
-       case INTEL_FAM6_ALDERLAKE_L:
-       case INTEL_FAM6_RAPTORLAKE:
-       case INTEL_FAM6_RAPTORLAKE_P:
-       case INTEL_FAM6_RAPTORLAKE_S:
+       case INTEL_ALDERLAKE:
+       case INTEL_ALDERLAKE_L:
+       case INTEL_RAPTORLAKE:
+       case INTEL_RAPTORLAKE_P:
+       case INTEL_RAPTORLAKE_S:
                /*
                 * Alder Lake has 2 types of CPU, core and atom.
                 *
@@ -6838,8 +6838,8 @@ __init int intel_pmu_init(void)
                name = "alderlake_hybrid";
                break;
 
-       case INTEL_FAM6_METEORLAKE:
-       case INTEL_FAM6_METEORLAKE_L:
+       case INTEL_METEORLAKE:
+       case INTEL_METEORLAKE_L:
                intel_pmu_init_hybrid(hybrid_big_small);
 
                x86_pmu.pebs_latency_data = mtl_latency_data_small;