Merge tag 'phy-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
 "As usual featuring couple of new driver and bunch of new device
  support and some driver changes to Freescale, rockchip driver along
  with couple of yaml binding conversions.

  New Support:
   - Qualcomm IPQ5424 qusb2 support, IPQ5018 uniphy-pcie driver
   - Rockchip usb2 support for RK3562, RK3036 usb2 phy support
   - Samsung exynos2200 eusb2 phy support and driver refactoring for
     this support, exynos7870 USBDRD support
   - Mediatek MT7988 xs-phy support
   - Broadcom BCM74110 usb phy support
   - Renesas RZ/V2H(P) usb2 phy support

  Updates:
   - Freescale phy rate claculation updates, i.MX95 tuning support
   - Better error handling for amlogic pcie phy
   - Rockchip color depth configuration and management support
   - Yaml binding conversion for RK3399 Type-C and PCIe Phy"

* tag 'phy-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (77 commits)
  phy: tegra: p2u: Broaden architecture dependency
  phy: rockchip: inno-usb2: Add usb2 phy support for rk3562
  dt-bindings: phy: rockchip,inno-usb2phy: add rk3562
  phy: rockchip: inno-usb2: add phy definition for rk3036
  dt-bindings: phy: rockchip,inno-usb2phy: add rk3036 compatible
  phy: freescale: fsl-samsung-hdmi: Improve LUT search for best clock
  phy: freescale: fsl-samsung-hdmi: Refactor finding PHY settings
  phy: freescale: fsl-samsung-hdmi: Rename phy_clk_round_rate
  phy: renesas: phy-rcar-gen3-usb2: Add USB2.0 PHY support for RZ/V2H(P)
  phy: renesas: phy-rcar-gen3-usb2: Sort compatible entries by SoC part number
  dt-bindings: phy: renesas,usb2-phy: Document RZ/V2H(P) SoC
  dt-bindings: phy: renesas,usb2-phy: Add clock constraint for RZ/G2L family
  phy: exynos5-usbdrd: support Exynos USBDRD 3.2 4nm controller
  phy: phy-snps-eusb2: add support for exynos2200
  phy: phy-snps-eusb2: refactor reference clock init
  phy: phy-snps-eusb2: make reset control optional
  phy: phy-snps-eusb2: make repeater optional
  phy: phy-snps-eusb2: split phy init code
  phy: phy-snps-eusb2: refactor constructs names
  phy: move phy-qcom-snps-eusb2 out of its vendor sub-directory
  ...

diff --cc Documentation/devicetree/bindings/soc/rockchip/grf.yaml
Simple merge

diff --cc drivers/phy/renesas/phy-rcar-gen3-usb2.c
index 9fdf17e,867f431..47beb94
--- 1/drivers/phy/renesas/phy-rcar-gen3-usb2.c
--- 2/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
@@@ -467,16 -472,24 +477,24 @@@ static int rcar_gen3_phy_usb2_init(stru
        val = readl(usb2_base + USB2_INT_ENABLE);
        val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
        writel(val, usb2_base + USB2_INT_ENABLE);
 -      writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
 -      writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
 -
 -      /* Initialize otg part */
 -      if (channel->is_otg_channel) {
 -              if (rcar_gen3_needs_init_otg(channel))
 -                      rcar_gen3_init_otg(channel);
 -              rphy->otg_initialized = true;
 +
 +      if (!rcar_gen3_is_any_rphy_initialized(channel)) {
 +              writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
 +              writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
        }
  
 +      /* Initialize otg part (only if we initialize a PHY with IRQs). */
 +      if (rphy->int_enable_bits)
 +              rcar_gen3_init_otg(channel);
 +
+       if (channel->utmi_ctrl) {
+               val = readl(usb2_base + USB2_REGEN_CG_CTRL) | USB2_REGEN_CG_CTRL_UPHY_WEN;
+               writel(val, usb2_base + USB2_REGEN_CG_CTRL);
+ 
+               writel(USB2_UTMI_CTRL_INIT, usb2_base + USB2_UTMI_CTRL);
+               writel(val & ~USB2_REGEN_CG_CTRL_UPHY_WEN, usb2_base + USB2_REGEN_CG_CTRL);
+       }
+ 
        rphy->initialized = true;
  
        return 0;
@@@ -764,7 -791,9 +792,9 @@@ static int rcar_gen3_phy_usb2_probe(str
        if (phy_data->no_adp_ctrl)
                channel->obint_enable_bits = USB2_OBINT_IDCHG_EN;
  
 -      mutex_init(&channel->lock);
+       channel->utmi_ctrl = phy_data->utmi_ctrl;
+ 
 +      spin_lock_init(&channel->lock);
        for (i = 0; i < NUM_OF_PHYS; i++) {
                channel->rphys[i].phy = devm_phy_create(dev, NULL,
                                                        phy_data->phy_usb2_ops);

diff --cc drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index 77236f0,bb49d69..79db57e
--- 1/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
--- 2/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@@ -444,47 -412,45 +412,47 @@@ struct rk_hdptx_phy 
  };
  
  static const struct ropll_config ropll_tmds_cfg[] = {
-       { 5940000, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+       { 594000000ULL, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 3712500, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+       { 371250000ULL, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 2970000, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+       { 297000000ULL, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1620000, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10,
+       { 162000000ULL, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10,
          1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1856250, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+       { 185625000ULL, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1540000, 193, 193, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 193, 1, 32, 2, 1,
+       { 154000000ULL, 193, 193, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 193, 1, 32, 2, 1,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1485000, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5,
+       { 148500000ULL, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5,
          0x10, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1462500, 122, 122, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 244, 1, 16, 2, 1, 1,
+       { 146250000ULL, 122, 122, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 244, 1, 16, 2, 1, 1,
          1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1190000, 149, 149, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 149, 1, 16, 2, 1, 1,
+       { 119000000ULL, 149, 149, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 149, 1, 16, 2, 1, 1,
          1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1065000, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1,
+       { 106500000ULL, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1,
          1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 1080000, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0,
+       { 108000000ULL, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0,
          0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 855000, 214, 214, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 214, 1, 16, 2, 1,
+       { 85500000ULL, 214, 214, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 214, 1, 16, 2, 1,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 835000, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0,
+       { 83500000ULL, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 928125, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+       { 92812500ULL, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 742500, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+       { 74250000ULL, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 650000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1,
+       { 65000000ULL, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1,
          1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 502500, 84, 84, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 11, 1, 4, 5,
++      { 50250000ULL, 84, 84, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 11, 1, 4, 5,
 +        4, 11, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 337500, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5,
+       { 33750000ULL, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5,
          1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 400000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0,
+       { 40000000ULL, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0,
          0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 270000, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0,
+       { 27000000ULL, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0,
          0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
-       { 251750, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1, 1,
+       { 25175000ULL, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1, 1,
          1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, },
  };
  

diff --cc include/linux/soc/samsung/exynos-regs-pmu.h
Simple merge