drm/i915: Apply FBC WA for TGL too
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 4 Sep 2019 23:02:40 +0000 (16:02 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Thu, 5 Sep 2019 17:13:52 +0000 (10:13 -0700)
WA 1409120013 is also valid for TGL, so lets check for ">= 11".

BSpec: 52890

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904230241.20638-1-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_fbc.c

index 16ed44b..dc34b23 100644 (file)
@@ -343,8 +343,8 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
                           HSW_FBCQ_DIS);
        }
 
-       if (IS_GEN(dev_priv, 11))
-               /* Wa_1409120013:icl,ehl */
+       if (INTEL_GEN(dev_priv) >= 11)
+               /* Wa_1409120013:icl,ehl,tgl */
                I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
 
        I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);