drm: rockchip: add alpha support for RK3036, RK3066, RK3126 and RK3188
authorAlex Bee <knaerzche@gmail.com>
Fri, 28 May 2021 13:05:53 +0000 (15:05 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Fri, 28 May 2021 17:28:00 +0000 (19:28 +0200)
With
commit 2aae8ed1f390 ("drm/rockchip: Add per-pixel alpha support for the PX30 VOP")
alpha support was introduced for PX30's VOP.
RK3036, RK3066, RK3126 and RK3188 VOPs support alpha blending in the
same manner.
With the exception of RK3066 all of them support pre-multiplied alpha.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210528130554.72191-5-knaerzche@gmail.com
drivers/gpu/drm/rockchip/rockchip_vop_reg.c
drivers/gpu/drm/rockchip/rockchip_vop_reg.h

index b7c5193..4d18b42 100644 (file)
@@ -104,6 +104,9 @@ static const struct vop_win_phy rk3036_win0_data = {
        .uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
        .uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
+       .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
+       .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0),
+       .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
 };
 
 static const struct vop_win_phy rk3036_win1_data = {
@@ -119,6 +122,9 @@ static const struct vop_win_phy rk3036_win1_data = {
        .dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0),
        .yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
+       .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
+       .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
+       .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
 };
 
 static const struct vop_win_data rk3036_vop_win_data[] = {
@@ -185,6 +191,9 @@ static const struct vop_win_phy rk3126_win1_data = {
        .dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),
        .yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
+       .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
+       .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
+       .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
 };
 
 static const struct vop_win_data rk3126_vop_win_data[] = {
@@ -364,6 +373,8 @@ static const struct vop_win_phy rk3066_win0_data = {
        .uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0),
        .uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16),
+       .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21),
+       .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 0),
 };
 
 static const struct vop_win_phy rk3066_win1_data = {
@@ -380,6 +391,8 @@ static const struct vop_win_phy rk3066_win1_data = {
        .uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0),
        .uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16),
+       .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22),
+       .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 1),
 };
 
 static const struct vop_win_phy rk3066_win2_data = {
@@ -393,6 +406,8 @@ static const struct vop_win_phy rk3066_win2_data = {
        .dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0),
        .yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0),
+       .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23),
+       .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 2),
 };
 
 static const struct vop_modeset rk3066_modeset = {
@@ -478,6 +493,9 @@ static const struct vop_win_phy rk3188_win0_data = {
        .yrgb_mst = VOP_REG(RK3188_WIN0_YRGB_MST0, 0xffffffff, 0),
        .uv_mst = VOP_REG(RK3188_WIN0_CBR_MST0, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 0),
+       .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 18),
+       .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 0),
+       .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),
 };
 
 static const struct vop_win_phy rk3188_win1_data = {
@@ -492,6 +510,9 @@ static const struct vop_win_phy rk3188_win1_data = {
        .dsp_st = VOP_REG(RK3188_WIN1_DSP_ST, 0x0fff0fff, 0),
        .yrgb_mst = VOP_REG(RK3188_WIN1_MST, 0xffffffff, 0),
        .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 16),
+       .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 19),
+       .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 1),
+       .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),
 };
 
 static const struct vop_modeset rk3188_modeset = {
index 6e9fa58..0b3cd65 100644 (file)
 #define RK3188_DSP_CTRL0               0x04
 #define RK3188_DSP_CTRL1               0x08
 #define RK3188_INT_STATUS              0x10
+#define RK3188_ALPHA_CTRL              0x14
 #define RK3188_WIN0_YRGB_MST0          0x20
 #define RK3188_WIN0_CBR_MST0           0x24
 #define RK3188_WIN0_YRGB_MST1          0x28