drm/amdgpu: fix mec queue policy on single MEC asics

Fixes hangs on single MEC asics.

Fixes: 2ed286fb434 (drm/amdgpu: new queue policy, take first 2 queues of each pipe v2)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 4c04e9d..862bc72 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2825,9 +2825,15 @@ static void gfx_v7_0_compute_queue_acquire(struct amdgpu_device *adev)
                if (mec >= adev->gfx.mec.num_mec)
                        break;
 
-               /* policy: amdgpu owns the first two queues of the first MEC */
-               if (mec == 0 && queue < 2)
-                       set_bit(i, adev->gfx.mec.queue_bitmap);
+               if (adev->gfx.mec.num_mec > 1) {
+                       /* policy: amdgpu owns the first two queues of the first MEC */
+                       if (mec == 0 && queue < 2)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               } else {
+                       /* policy: amdgpu owns all queues in the first pipe */
+                       if (mec == 0 && pipe == 0)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               }
        }
 
        /* update the number of active compute rings */

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ad2e0bb..1370b39 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1464,9 +1464,15 @@ static void gfx_v8_0_compute_queue_acquire(struct amdgpu_device *adev)
                if (mec >= adev->gfx.mec.num_mec)
                        break;
 
-               /* policy: amdgpu owns the first two queues of the first MEC */
-               if (mec == 0 && queue < 2)
-                       set_bit(i, adev->gfx.mec.queue_bitmap);
+               if (adev->gfx.mec.num_mec > 1) {
+                       /* policy: amdgpu owns the first two queues of the first MEC */
+                       if (mec == 0 && queue < 2)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               } else {
+                       /* policy: amdgpu owns all queues in the first pipe */
+                       if (mec == 0 && pipe == 0)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               }
        }
 
        /* update the number of active compute rings */

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index cf15a35..9d675b3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -873,9 +873,15 @@ static void gfx_v9_0_compute_queue_acquire(struct amdgpu_device *adev)
                if (mec >= adev->gfx.mec.num_mec)
                        break;
 
-               /* policy: amdgpu owns the first two queues of the first MEC */
-               if (mec == 0 && queue < 2)
-                       set_bit(i, adev->gfx.mec.queue_bitmap);
+               if (adev->gfx.mec.num_mec > 1) {
+                       /* policy: amdgpu owns the first two queues of the first MEC */
+                       if (mec == 0 && queue < 2)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               } else {
+                       /* policy: amdgpu owns all queues in the first pipe */
+                       if (mec == 0 && pipe == 0)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               }
        }
 
        /* update the number of active compute rings */