drm/i915: fix subslice mask array size
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Tue, 6 Nov 2018 18:29:18 +0000 (10:29 -0800)
committerDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Fri, 9 Nov 2018 19:41:43 +0000 (11:41 -0800)
We have a subslice mask per slice, not per subslice.
MAX_SUBSLICES > MAX_SLICES, so the wrong size didn't cause any issue
apart from using extra memory.

Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181106182918.5748-1-daniele.ceraolospurio@intel.com
drivers/gpu/drm/i915/intel_device_info.h

index 86ce1db..88f9721 100644 (file)
@@ -124,7 +124,7 @@ enum intel_ppgtt {
 
 struct sseu_dev_info {
        u8 slice_mask;
-       u8 subslice_mask[GEN_MAX_SUBSLICES];
+       u8 subslice_mask[GEN_MAX_SLICES];
        u16 eu_total;
        u8 eu_per_subslice;
        u8 min_eu_in_pool;