spi: spi-cadence: add support for chip select high
authorShreyas Joshi <shreyas.joshi@biamp.com>
Fri, 10 Jul 2020 21:16:55 +0000 (07:16 +1000)
committerMark Brown <broonie@kernel.org>
Wed, 22 Jul 2020 00:55:51 +0000 (01:55 +0100)
The spi cadence driver should support spi-cs-high in mode bits
so that the peripherals that needs the chip select to be high active can
use it. Add the SPI-CS-HIGH flag in the supported mode bits.

Signed-off-by: Shreyas Joshi <shreyas.joshi@biamp.com>
Link: https://lore.kernel.org/r/20200710211655.1564-1-shreyas.joshi@biamp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-cadence.c

index 82a0ee0..2b6b9c1 100644 (file)
@@ -556,7 +556,7 @@ static int cdns_spi_probe(struct platform_device *pdev)
        master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware;
        master->set_cs = cdns_spi_chipselect;
        master->auto_runtime_pm = true;
-       master->mode_bits = SPI_CPOL | SPI_CPHA;
+       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
 
        /* Set to default valid value */
        master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;