drm/amdgpu: add print support for vcn_v3_0 ip dump
authorSunil Khatri <sunil.khatri@amd.com>
Wed, 24 Jul 2024 11:18:28 +0000 (16:48 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 27 Jul 2024 21:28:41 +0000 (17:28 -0400)
Add support for logging the registers in devcoredump
buffer for vcn_v3_0.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

index d0bca93..9e1cbee 100644 (file)
@@ -2324,6 +2324,32 @@ static void vcn_v3_0_set_irq_funcs(struct amdgpu_device *adev)
        }
 }
 
+static void vcn_v3_0_print_ip_state(void *handle, struct drm_printer *p)
+{
+       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       int i, j;
+       uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_3_0);
+       uint32_t inst_off;
+
+       if (!adev->vcn.ip_dump)
+               return;
+
+       drm_printf(p, "num_instances:%d\n", adev->vcn.num_vcn_inst);
+       for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
+               if (adev->vcn.harvest_config & (1 << i)) {
+                       drm_printf(p, "\nHarvested Instance:VCN%d Skipping dump\n", i);
+                       continue;
+               }
+
+               inst_off = i * reg_count;
+               drm_printf(p, "\nActive Instance:VCN%d\n", i);
+
+               for (j = 0; j < reg_count; j++)
+                       drm_printf(p, "%-50s \t 0x%08x\n", vcn_reg_list_3_0[j].reg_name,
+                                  adev->vcn.ip_dump[inst_off + j]);
+       }
+}
+
 static void vcn_v3_0_dump_ip_state(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -2369,7 +2395,7 @@ static const struct amd_ip_funcs vcn_v3_0_ip_funcs = {
        .set_clockgating_state = vcn_v3_0_set_clockgating_state,
        .set_powergating_state = vcn_v3_0_set_powergating_state,
        .dump_ip_state = vcn_v3_0_dump_ip_state,
-       .print_ip_state = NULL,
+       .print_ip_state = vcn_v3_0_print_ip_state,
 };
 
 const struct amdgpu_ip_block_version vcn_v3_0_ip_block = {