arm64: dts: hisilicon: delete unused property smmu-cb-memtype

The "smmu-cb-memtype" is a private property developed by the Hisilicon
driver in the early stage and is not used now. So delete it.

Otherwise, below YAML check warnings are reported:
arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 78050d6..7deca5f 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -335,7 +335,6 @@
                reg = <0x0 0xa0040000 0x0 0x20000>;
                #iommu-cells = <1>;
                dma-coherent;
-               smmu-cb-memtype = <0x0 0x1>;
                hisilicon,broken-prefetch-cmd;
                status = "disabled";
        };

diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index f477f44..2172d80 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1166,7 +1166,6 @@
                reg = <0x0 0xa0040000 0x0 0x20000>;
                #iommu-cells = <1>;
                dma-coherent;
-               smmu-cb-memtype = <0x0 0x1>;
                hisilicon,broken-prefetch-cmd;
                status = "disabled";
        };
@@ -1181,7 +1180,6 @@
                #iommu-cells = <1>;
                dma-coherent;
                hisilicon,broken-prefetch-cmd;
-               /* smmu-cb-memtype = <0x0 0x1>;*/
        };
        p0_smmu_alg_b: iommu@8d0040000 {
                compatible = "arm,smmu-v3";
@@ -1194,7 +1192,6 @@
                #iommu-cells = <1>;
                dma-coherent;
                hisilicon,broken-prefetch-cmd;
-               /* smmu-cb-memtype = <0x0 0x1>;*/
        };
        p1_smmu_alg_a: iommu@400d0040000 {
                compatible = "arm,smmu-v3";
@@ -1207,7 +1204,6 @@
                #iommu-cells = <1>;
                dma-coherent;
                hisilicon,broken-prefetch-cmd;
-               /* smmu-cb-memtype = <0x0 0x1>;*/
        };
        p1_smmu_alg_b: iommu@408d0040000 {
                compatible = "arm,smmu-v3";
@@ -1220,7 +1216,6 @@
                #iommu-cells = <1>;
                dma-coherent;
                hisilicon,broken-prefetch-cmd;
-               /* smmu-cb-memtype = <0x0 0x1>;*/
        };
 
        soc {