drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability
authorMatt Roper <matthew.d.roper@intel.com>
Tue, 24 Dec 2019 23:15:21 +0000 (15:15 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 31 Dec 2019 17:37:35 +0000 (09:37 -0800)
Our usual i915 convention is to assume that future platforms will follow
the same behavior as the latest platform of today.  The VDBOX/SFC
capabilities described here don't seem like something that should be
specific to TGL, so let's future-proof by making the test apply to all
gen12+ platforms.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191224231521.3430660-1-matthew.d.roper@intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/i915/intel_device_info.c

index d87c314..6670a07 100644 (file)
@@ -1093,7 +1093,7 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
                 * hooked up to an SFC (Scaler & Format Converter) unit.
                 * In TGL each VDBOX has access to an SFC.
                 */
-               if (IS_TIGERLAKE(dev_priv) || logical_vdbox++ % 2 == 0)
+               if (INTEL_GEN(dev_priv) >= 12 || logical_vdbox++ % 2 == 0)
                        RUNTIME_INFO(dev_priv)->vdbox_sfc_access |= BIT(i);
        }
        DRM_DEBUG_DRIVER("vdbox enable: %04x, instances: %04lx\n",