drm/i915/display: fix typo in the comment
authorYan Zhen <yanzhen@vivo.com>
Fri, 13 Sep 2024 06:17:27 +0000 (14:17 +0800)
committerAndi Shyti <andi.shyti@linux.intel.com>
Mon, 16 Sep 2024 09:03:52 +0000 (11:03 +0200)
Correctly spelled comments make it easier for the reader to understand
the code.

Replace 'platformas' with 'platforms' in the comment &
replace 'prefere' with 'prefer' in the comment &
replace 'corresponsding' with 'corresponding' in the comment &
replace 'harizontal' with 'horizontal' in the comment.

Signed-off-by: Yan Zhen <yanzhen@vivo.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240913061727.170198-1-yanzhen@vivo.com
drivers/gpu/drm/i915/display/intel_display_debugfs.c
drivers/gpu/drm/i915/display/intel_dpll.c
drivers/gpu/drm/i915/display/intel_lvds.c
drivers/gpu/drm/i915/display/vlv_dsi.c

index 8caacdd..86403a9 100644 (file)
@@ -426,7 +426,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
        int num_scalers = crtc->num_scalers;
        int i;
 
-       /* Not all platformas have a scaler */
+       /* Not all platforms have a scaler */
        if (num_scalers) {
                seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
                           num_scalers,
index bc72d1c..38e34b7 100644 (file)
@@ -780,7 +780,7 @@ g4x_find_best_dpll(const struct intel_limit *limit,
        max_n = limit->n.max;
        /* based on hardware requirement, prefer smaller n to precision */
        for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
-               /* based on hardware requirement, prefere larger m1,m2 */
+               /* based on hardware requirement, prefer larger m1,m2 */
                for (clock.m1 = limit->m1.max;
                     clock.m1 >= limit->m1.min; clock.m1--) {
                        for (clock.m2 = limit->m2.max;
index 1734b12..5f753ee 100644 (file)
@@ -264,7 +264,7 @@ static void intel_pre_enable_lvds(struct intel_atomic_state *state,
                temp |= LVDS_PIPE_SEL(pipe);
        }
 
-       /* set the corresponsding LVDS_BORDER bit */
+       /* set the corresponding LVDS_BORDER bit */
        temp &= ~LVDS_BORDER_ENABLE;
        temp |= crtc_state->gmch_pfit.lvds_border_bits;
 
index f196600..32d15bd 100644 (file)
@@ -1072,7 +1072,7 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,
        hsync = intel_de_read(display, MIPI_HSYNC_PADDING_COUNT(display, port));
        hbp = intel_de_read(display, MIPI_HBP_COUNT(display, port));
 
-       /* harizontal values are in terms of high speed byte clock */
+       /* horizontal values are in terms of high speed byte clock */
        hfp = pixels_from_txbyteclkhs(hfp, bpp, lane_count,
                                                intel_dsi->burst_mode_ratio);
        hsync = pixels_from_txbyteclkhs(hsync, bpp, lane_count,