KVM: x86/mmu: Do not set paging-related bits in MMU role if CR0.PG=0
authorSean Christopherson <seanjc@google.com>
Tue, 22 Jun 2021 17:57:11 +0000 (10:57 -0700)
committerPaolo Bonzini <pbonzini@redhat.com>
Thu, 24 Jun 2021 22:00:41 +0000 (18:00 -0400)
Don't set CR0/CR4/EFER bits in the MMU role if paging is disabled, paging
modifiers are irrelevant if there is no paging in the first place.
Somewhat arbitrarily clear gpte_is_8_bytes for shadow paging if paging is
disabled in the guest.  Again, there are no guest PTEs to process, so the
size is meaningless.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210622175739.3610207-27-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/mmu/mmu.c

index 1e5beac..b109ea1 100644 (file)
@@ -4568,13 +4568,15 @@ static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu,
 {
        union kvm_mmu_extended_role ext = {0};
 
-       ext.cr0_pg = ____is_cr0_pg(regs);
-       ext.cr4_pae = ____is_cr4_pae(regs);
-       ext.cr4_smep = ____is_cr4_smep(regs);
-       ext.cr4_smap = ____is_cr4_smap(regs);
-       ext.cr4_pse = ____is_cr4_pse(regs);
-       ext.cr4_pke = ____is_cr4_pke(regs);
-       ext.cr4_la57 = ____is_cr4_la57(regs);
+       if (____is_cr0_pg(regs)) {
+               ext.cr0_pg = 1;
+               ext.cr4_pae = ____is_cr4_pae(regs);
+               ext.cr4_smep = ____is_cr4_smep(regs);
+               ext.cr4_smap = ____is_cr4_smap(regs);
+               ext.cr4_pse = ____is_cr4_pse(regs);
+               ext.cr4_pke = ____is_cr4_pke(regs);
+               ext.cr4_la57 = ____is_cr4_la57(regs);
+       }
 
        ext.valid = 1;
 
@@ -4588,8 +4590,10 @@ static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu,
        union kvm_mmu_role role = {0};
 
        role.base.access = ACC_ALL;
-       role.base.efer_nx = ____is_efer_nx(regs);
-       role.base.cr0_wp = ____is_cr0_wp(regs);
+       if (____is_cr0_pg(regs)) {
+               role.base.efer_nx = ____is_efer_nx(regs);
+               role.base.cr0_wp = ____is_cr0_wp(regs);
+       }
        role.base.smm = is_smm(vcpu);
        role.base.guest_mode = is_guest_mode(vcpu);
 
@@ -4680,7 +4684,7 @@ kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu,
 
        role.base.smep_andnot_wp = role.ext.cr4_smep && !____is_cr0_wp(regs);
        role.base.smap_andnot_wp = role.ext.cr4_smap && !____is_cr0_wp(regs);
-       role.base.gpte_is_8_bytes = ____is_cr4_pae(regs);
+       role.base.gpte_is_8_bytes = ____is_cr0_pg(regs) && ____is_cr4_pae(regs);
 
        return role;
 }