#include "hwmgr.h"
#include "amd_powerplay.h"
-#include "vega10_smumgr.h"
#include "hardwaremanager.h"
#include "ppatomfwctrl.h"
#include "atomfirmware.h"
.set_power_limit = vega10_set_power_limit,
};
+int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
+ bool enable, uint32_t feature_mask)
+{
+ int msg = enable ? PPSMC_MSG_EnableSmuFeatures :
+ PPSMC_MSG_DisableSmuFeatures;
+
+ return smum_send_msg_to_smc_with_parameter(hwmgr,
+ msg, feature_mask);
+}
+
int vega10_hwmgr_init(struct pp_hwmgr *hwmgr)
{
hwmgr->hwmgr_func = &vega10_hwmgr_funcs;
int vega10_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate);
int vega10_update_acp_dpm(struct pp_hwmgr *hwmgr, bool bgate);
int vega10_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable);
+int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
+ bool enable, uint32_t feature_mask);
#endif /* _VEGA10_HWMGR_H_ */
#include "hwmgr.h"
#include "vega10_hwmgr.h"
#include "vega10_powertune.h"
-#include "vega10_smumgr.h"
#include "vega10_ppsmc.h"
#include "vega10_inc.h"
#include "pp_debug.h"
#include "vega10_thermal.h"
#include "vega10_hwmgr.h"
-#include "vega10_smumgr.h"
#include "vega10_ppsmc.h"
#include "vega10_inc.h"
#include "pp_soc15.h"
#include "vega10_inc.h"
#include "pp_soc15.h"
#include "vega10_smumgr.h"
+#include "vega10_hwmgr.h"
#include "vega10_ppsmc.h"
#include "smu9_driver_if.h"
#include "ppatomctrl.h"
return 0;
}
-int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
- bool enable, uint32_t feature_mask)
-{
- int msg = enable ? PPSMC_MSG_EnableSmuFeatures :
- PPSMC_MSG_DisableSmuFeatures;
-
- return vega10_send_msg_to_smc_with_parameter(hwmgr,
- msg, feature_mask);
-}
-
static int vega10_get_smc_features(struct pp_hwmgr *hwmgr,
uint32_t *features_enabled)
{
#ifndef _VEGA10_SMUMANAGER_H_
#define _VEGA10_SMUMANAGER_H_
-#include "vega10_hwmgr.h"
-
#define MAX_SMU_TABLE 5
struct smu_table_entry {
struct smu_table_array smu_tables;
};
-int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
- bool enable, uint32_t feature_mask);
-
#endif