drm/i915: Program MBUS with rmw during initialization
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 28 Feb 2020 00:43:19 +0000 (16:43 -0800)
committerJani Nikula <jani.nikula@intel.com>
Mon, 2 Mar 2020 08:48:20 +0000 (10:48 +0200)
It wasn't terribly clear from the bspec's wording, but after discussion
with the hardware folks, it turns out that we need to preserve the
pre-existing contents of the MBUS ABOX control register when
initializing a few specific bits.

Bspec: 49213
Bspec: 50096
Fixes: 4cb4585e5a7f ("drm/i915/icl: initialize MBus during display init")
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200204011032.582737-1-matthew.d.roper@intel.com
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
(cherry picked from commit 837b63e6087838d0f1e612d448405419199d8033)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200228004320.127142-1-matthew.d.roper@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c

index 21561ac..ae532e4 100644 (file)
@@ -4466,13 +4466,19 @@ static void icl_dbuf_disable(struct drm_i915_private *dev_priv)
 
 static void icl_mbus_init(struct drm_i915_private *dev_priv)
 {
-       u32 val;
+       u32 mask, val;
 
-       val = MBUS_ABOX_BT_CREDIT_POOL1(16) |
-             MBUS_ABOX_BT_CREDIT_POOL2(16) |
-             MBUS_ABOX_B_CREDIT(1) |
-             MBUS_ABOX_BW_CREDIT(1);
+       mask = MBUS_ABOX_BT_CREDIT_POOL1_MASK |
+               MBUS_ABOX_BT_CREDIT_POOL2_MASK |
+               MBUS_ABOX_B_CREDIT_MASK |
+               MBUS_ABOX_BW_CREDIT_MASK;
 
+       val = I915_READ(MBUS_ABOX_CTL);
+       val &= ~mask;
+       val |= MBUS_ABOX_BT_CREDIT_POOL1(16) |
+               MBUS_ABOX_BT_CREDIT_POOL2(16) |
+               MBUS_ABOX_B_CREDIT(1) |
+               MBUS_ABOX_BW_CREDIT(1);
        I915_WRITE(MBUS_ABOX_CTL, val);
 }