drm/i915/guc: Enable GuC based workarounds for DG2

There are some workarounds for DG2 that are implemented in the GuC
firmware. However, the KMD is required to enable these by setting the
appropriate flag as GuC does not know what platform it is running on.
  Wa_16011759253
  Wa_14012630569
  Wa_14013746162

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
CC: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220415224025.3693037-4-umesh.nerlige.ramappa@intel.com

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 185fb4d..fd04c4c 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -292,6 +292,20 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
            GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 50))
                flags |= GUC_WA_POLLCS;
 
+       /* Wa_16011759253:dg2_g10:a0 */
+       if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_B0))
+               flags |= GUC_WA_GAM_CREDITS;
+
+       /*
+        * Wa_14012197797:dg2_g10:a0,dg2_g11:a0
+        * Wa_22011391025:dg2_g10,dg2_g11,dg2_g12
+        *
+        * The same WA bit is used for both and 22011391025 is applicable to
+        * all DG2.
+        */
+       if (IS_DG2(gt->i915))
+               flags |= GUC_WA_DUAL_QUEUE;
+
        /* Wa_22011802037: graphics version 12 */
        if (GRAPHICS_VER(gt->i915) == 12)
                flags |= GUC_WA_PRE_PARSER;

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index b136d65..fe5751f 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -98,6 +98,8 @@
 #define   GUC_LOG_BUF_ADDR_SHIFT       12
 
 #define GUC_CTL_WA                     1
+#define   GUC_WA_GAM_CREDITS           BIT(10)
+#define   GUC_WA_DUAL_QUEUE            BIT(11)
 #define   GUC_WA_PRE_PARSER            BIT(14)
 #define   GUC_WA_POLLCS                        BIT(18)