drm/i915: Return residency as microseconds

Change the granularity from milliseconds to microseconds
when returning rc6 residencies. This is in preparation
for increased resolution on some platforms.

v2: use 64bit div macro (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9f4264a..0374e2e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3879,8 +3879,8 @@ void vlv_phy_reset_lanes(struct intel_encoder *encoder);
 
 int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
 int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
-u32 intel_rc6_residency(struct drm_i915_private *dev_priv,
-                       i915_reg_t reg);
+u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
+                          const i915_reg_t reg);
 
 #define I915_READ8(reg)                dev_priv->uncore.funcs.mmio_readb(dev_priv, (reg), true)
 #define I915_WRITE8(reg, val)  dev_priv->uncore.funcs.mmio_writeb(dev_priv, (reg), (val), true)

diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index ab723e3..f3fdfda 100644 (file)
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -42,7 +42,8 @@ static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev)
 static u32 calc_residency(struct drm_i915_private *dev_priv,
                          i915_reg_t reg)
 {
-       return intel_rc6_residency(dev_priv, reg);
+       return DIV_ROUND_CLOSEST_ULL(intel_rc6_residency_us(dev_priv, reg),
+                                    1000);
 }
 
 static ssize_t

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a4a2c23..da742a9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8350,12 +8350,12 @@ void intel_pm_setup(struct drm_i915_private *dev_priv)
        atomic_set(&dev_priv->pm.wakeref_count, 0);
 }
 
-u32 intel_rc6_residency(struct drm_i915_private *dev_priv,
-                       i915_reg_t reg)
+u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
+                          const i915_reg_t reg)
 {
        u64 raw_time; /* 32b value may overflow during fixed point math */
-       u64 units = 128ULL, div = 100000ULL;
-       u32 ret;
+       u64 units = 128000ULL, div = 100000ULL;
+       u64 ret;
 
        if (!intel_enable_rc6())
                return 0;
@@ -8364,13 +8364,13 @@ u32 intel_rc6_residency(struct drm_i915_private *dev_priv,
 
        /* On VLV and CHV, residency time is in CZ units rather than 1.28us */
        if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
-               units = 1;
+               units = 1000;
                div = dev_priv->czclk_freq;
 
                if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
                        units <<= 8;
        } else if (IS_GEN9_LP(dev_priv)) {
-               units = 1;
+               units = 1000;
                div = 1200;             /* 833.33ns */
        }