ARM: dts: sun8i: v3s: Move the csi1 block to follow address order
authorPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Sat, 5 Feb 2022 18:53:24 +0000 (19:53 +0100)
committerMaxime Ripard <maxime@cerno.tech>
Mon, 7 Feb 2022 09:02:26 +0000 (10:02 +0100)
The csi1 block node was mistakenly added before the gic node, although
its address comes after the gic's. Move the node to its correct
position.

Fixes: 90e048101fa1 ("ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node")
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220205185429.2278860-2-paul.kocialkowski@bootlin.com
arch/arm/boot/dts/sun8i-v3s.dtsi

index b30bc1a..084323d 100644 (file)
                        #size-cells = <0>;
                };
 
+               gic: interrupt-controller@1c81000 {
+                       compatible = "arm,gic-400";
+                       reg = <0x01c81000 0x1000>,
+                             <0x01c82000 0x2000>,
+                             <0x01c84000 0x2000>,
+                             <0x01c86000 0x2000>;
+                       interrupt-controller;
+                       #interrupt-cells = <3>;
+                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+               };
+
                csi1: camera@1cb4000 {
                        compatible = "allwinner,sun8i-v3s-csi";
                        reg = <0x01cb4000 0x3000>;
                        resets = <&ccu RST_BUS_CSI>;
                        status = "disabled";
                };
-
-               gic: interrupt-controller@1c81000 {
-                       compatible = "arm,gic-400";
-                       reg = <0x01c81000 0x1000>,
-                             <0x01c82000 0x2000>,
-                             <0x01c84000 0x2000>,
-                             <0x01c86000 0x2000>;
-                       interrupt-controller;
-                       #interrupt-cells = <3>;
-                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-               };
        };
 };