ARM: dts: rockchip: add tuning related settings to veyron devices
authorHeiko Stuebner <heiko@sntech.de>
Mon, 12 Oct 2015 12:48:30 +0000 (14:48 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 26 Oct 2015 15:00:13 +0000 (16:00 +0100)
This allows the tuning code to run and use higher speeds on capable cards.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
arch/arm/boot/dts/rk3288-veyron.dtsi

index b5334ec..fec076e 100644 (file)
@@ -90,7 +90,7 @@
        regulators {
                vccio_sd: LDO_REG4 {
                        regulator-name = "vccio_sd";
-                       regulator-min-microvolt = <3300000>;
+                       regulator-min-microvolt = <1800000>;
                        regulator-max-microvolt = <3300000>;
                        regulator-state-mem {
                                regulator-off-in-suspend;
        cap-sd-highspeed;
        card-detect-delay = <200>;
        cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+       rockchip,default-sample-phase = <90>;
        num-slots = <1>;
+       sd-uhs-sdr12;
+       sd-uhs-sdr25;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
        vmmc-supply = <&vcc33_sd>;
        vqmmc-supply = <&vccio_sd>;
 };
index 275c78c..860cea0 100644 (file)
        broken-cd;
        bus-width = <8>;
        cap-mmc-highspeed;
+       rockchip,default-sample-phase = <158>;
        disable-wp;
+       mmc-hs200-1_8v;
        mmc-pwrseq = <&emmc_pwrseq>;
        non-removable;
        num-slots = <1>;
        num-slots = <1>;
        pinctrl-names = "default";
        pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
+       sd-uhs-sdr12;
+       sd-uhs-sdr25;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
        vmmc-supply = <&vcc33_sys>;
        vqmmc-supply = <&vcc18_wl>;
 };