ARM: dts: aspeed: Describe SD controllers
authorAndrew Jeffery <andrew@aj.id.au>
Fri, 12 Jul 2019 03:37:25 +0000 (13:07 +0930)
committerJoel Stanley <joel@jms.id.au>
Wed, 21 Aug 2019 03:58:38 +0000 (13:28 +0930)
The AST2400 and AST2500 both share the same SD controller, at the same
location in the physical address space and the same hardware interrupt,
with the same clock configurations.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-g4.dtsi
arch/arm/boot/dts/aspeed-g5.dtsi

index dd4b0b1..e465cda 100644 (file)
                                reg = <0x1e720000 0x8000>;      // 32K
                        };
 
+                       sdmmc: sd-controller@1e740000 {
+                               compatible = "aspeed,ast2400-sd-controller";
+                               reg = <0x1e740000 0x100>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x1e740000 0x10000>;
+                               clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
+                               status = "disabled";
+
+                               sdhci0: sdhci@100 {
+                                       compatible = "aspeed,ast2400-sdhci";
+                                       reg = <0x100 0x100>;
+                                       interrupts = <26>;
+                                       sdhci,auto-cmd12;
+                                       clocks = <&syscon ASPEED_CLK_SDIO>;
+                                       status = "disabled";
+                               };
+
+                               sdhci1: sdhci@200 {
+                                       compatible = "aspeed,ast2400-sdhci";
+                                       reg = <0x200 0x100>;
+                                       interrupts = <26>;
+                                       sdhci,auto-cmd12;
+                                       clocks = <&syscon ASPEED_CLK_SDIO>;
+                                       status = "disabled";
+                               };
+                       };
+
                        gpio: gpio@1e780000 {
                                #gpio-cells = <2>;
                                gpio-controller;
index ca36d18..f360b6c 100644 (file)
                                reg = <0x1e720000 0x9000>;      // 36K
                        };
 
+                       sdmmc: sd-controller@1e740000 {
+                               compatible = "aspeed,ast2500-sd-controller";
+                               reg = <0x1e740000 0x100>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x1e740000 0x10000>;
+                               clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
+                               status = "disabled";
+
+                               sdhci0: sdhci@100 {
+                                       compatible = "aspeed,ast2500-sdhci";
+                                       reg = <0x100 0x100>;
+                                       interrupts = <26>;
+                                       sdhci,auto-cmd12;
+                                       clocks = <&syscon ASPEED_CLK_SDIO>;
+                                       status = "disabled";
+                               };
+
+                               sdhci1: sdhci@200 {
+                                       compatible = "aspeed,ast2500-sdhci";
+                                       reg = <0x200 0x100>;
+                                       interrupts = <26>;
+                                       sdhci,auto-cmd12;
+                                       clocks = <&syscon ASPEED_CLK_SDIO>;
+                                       status = "disabled";
+                               };
+                       };
+
                        gpio: gpio@1e780000 {
                                #gpio-cells = <2>;
                                gpio-controller;