dt-bindings: power: Add r8a779a0 SYSC power domain definitions
authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Mon, 7 Sep 2020 09:19:40 +0000 (18:19 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 10 Sep 2020 14:57:34 +0000 (16:57 +0200)
Add power domain indices for R-Car V3U (r8a779a0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599470390-29719-5-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/power/r8a779a0-sysc.h [new file with mode: 0644]

diff --git a/include/dt-bindings/power/r8a779a0-sysc.h b/include/dt-bindings/power/r8a779a0-sysc.h
new file mode 100644 (file)
index 0000000..57929e4
--- /dev/null
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A779A0_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A779A0_SYSC_H__
+
+/*
+ * These power domain indices match the Power Domain Register Numbers (PDR)
+ */
+
+#define R8A779A0_PD_A1E0D0C0           0
+#define R8A779A0_PD_A1E0D0C1           1
+#define R8A779A0_PD_A1E0D1C0           2
+#define R8A779A0_PD_A1E0D1C1           3
+#define R8A779A0_PD_A1E1D0C0           4
+#define R8A779A0_PD_A1E1D0C1           5
+#define R8A779A0_PD_A1E1D1C0           6
+#define R8A779A0_PD_A1E1D1C1           7
+#define R8A779A0_PD_A2E0D0             16
+#define R8A779A0_PD_A2E0D1             17
+#define R8A779A0_PD_A2E1D0             18
+#define R8A779A0_PD_A2E1D1             19
+#define R8A779A0_PD_A3E0               20
+#define R8A779A0_PD_A3E1               21
+#define R8A779A0_PD_3DG_A              24
+#define R8A779A0_PD_3DG_B              25
+#define R8A779A0_PD_A1CNN2             32
+#define R8A779A0_PD_A1DSP0             33
+#define R8A779A0_PD_A2IMP01            34
+#define R8A779A0_PD_A2DP0              35
+#define R8A779A0_PD_A2CV0              36
+#define R8A779A0_PD_A2CV1              37
+#define R8A779A0_PD_A2CV4              38
+#define R8A779A0_PD_A2CV6              39
+#define R8A779A0_PD_A2CN2              40
+#define R8A779A0_PD_A1CNN0             41
+#define R8A779A0_PD_A2CN0              42
+#define R8A779A0_PD_A3IR               43
+#define R8A779A0_PD_A1CNN1             44
+#define R8A779A0_PD_A1DSP1             45
+#define R8A779A0_PD_A2IMP23            46
+#define R8A779A0_PD_A2DP1              47
+#define R8A779A0_PD_A2CV2              48
+#define R8A779A0_PD_A2CV3              49
+#define R8A779A0_PD_A2CV5              50
+#define R8A779A0_PD_A2CV7              51
+#define R8A779A0_PD_A2CN1              52
+#define R8A779A0_PD_A3VIP0             56
+#define R8A779A0_PD_A3VIP1             57
+#define R8A779A0_PD_A3VIP2             58
+#define R8A779A0_PD_A3VIP3             59
+#define R8A779A0_PD_A3ISP01            60
+#define R8A779A0_PD_A3ISP23            61
+
+/* Always-on power area */
+#define R8A779A0_PD_ALWAYS_ON          64
+
+#endif /* __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ */