ARM: dts: am571x-idk: Add CMA pools and enable IPUs & DSP1 rprocs

The CMA reserved memory nodes have been added for both the IPUs and the
DSP1 remoteproc devices on the AM571x IDK board. These nodes are assigned
to the respective rproc device nodes, and both the IPUs and the DSP1
remote processors are enabled for this board.

The current CMA pools and sizes are defined statically for each device.
The addresses chosen are the same as the respective processors on the
DRA72 EVM board to maintain firmware compatibility between the two boards.
The CMA pools and sizes are defined using 64-bit values to support LPAE.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and this will go away when the remote-side
code has been improved to gather this information runtime during its
initialization.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts
index 98f1223..62eb2b6 100644 (file)
--- a/arch/arm/boot/dts/am571x-idk.dts
+++ b/arch/arm/boot/dts/am571x-idk.dts
@@ -21,6 +21,33 @@
                reg = <0x0 0x80000000 0x0 0x40000000>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               ipu2_memory_region: ipu2-memory@95800000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x95800000 0x0 0x3800000>;
+                       reusable;
+                       status = "okay";
+               };
+
+               dsp1_memory_region: dsp1-memory@99000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x99000000 0x0 0x4000000>;
+                       reusable;
+                       status = "okay";
+               };
+
+               ipu1_memory_region: ipu1-memory@9d000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x9d000000 0x0 0x2000000>;
+                       reusable;
+                       status = "okay";
+               };
+       };
+
        leds {
                compatible = "gpio-leds";
                cpu0-led {
@@ -149,6 +176,21 @@
        load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
 };
 
+&ipu2 {
+       status = "okay";
+       memory-region = <&ipu2_memory_region>;
+};
+
+&ipu1 {
+       status = "okay";
+       memory-region = <&ipu1_memory_region>;
+};
+
+&dsp1 {
+       status = "okay";
+       memory-region = <&dsp1_memory_region>;
+};
+
 &pcie1_rc {
        status = "okay";
        gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;