There is only need to enable/disable once the PLL when the bias is going
between on, prepare, standby and off states.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
case SND_SOC_BIAS_ON:
break;
case SND_SOC_BIAS_PREPARE:
- if (aic3x->master) {
+ if (codec->bias_level == SND_SOC_BIAS_STANDBY &&
+ aic3x->master) {
/* enable pll */
reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG);
aic3x_write(codec, AIC3X_PLL_PROGA_REG,
}
break;
case SND_SOC_BIAS_STANDBY:
- /* fall through and disable pll */
- case SND_SOC_BIAS_OFF:
- if (aic3x->master) {
+ if (codec->bias_level == SND_SOC_BIAS_PREPARE &&
+ aic3x->master) {
/* disable pll */
reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG);
aic3x_write(codec, AIC3X_PLL_PROGA_REG,
reg & ~PLL_ENABLE);
}
break;
+ case SND_SOC_BIAS_OFF:
+ break;
}
codec->bias_level = level;