ARM: orion5x: clean up mach/*.h headers

This is a simple move of all header files that are no longer
included by anything else from the include/mach directory
to the platform directory itself as preparation for
multiplatform support.

The mach/uncompress.h headers are left in place for now,
and are mildly modified to be independent of the other
headers. They will be removed entirely when ARCH_MULTIPLATFORM
gets enabled and they become obsolete.

Rather than updating the path names inside of the comments
of each header, I delete those comments to avoid having to
update them again, should they get moved or copied another
time.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

diff --git a/arch/arm/mach-orion5x/board-d2net.c b/arch/arm/mach-orion5x/board-d2net.c
index 8a72841..a89376a 100644 (file)
--- a/arch/arm/mach-orion5x/board-d2net.c
+++ b/arch/arm/mach-orion5x/board-d2net.c
@@ -20,9 +20,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include <plat/orion-gpio.h>
 #include "common.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * LaCie d2 Network Info

diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index d087178..6f4c2c4 100644 (file)
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -20,10 +20,10 @@
 #include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/orion5x.h>
-#include <mach/bridge-regs.h>
 #include <plat/irq.h>
 #include <plat/time.h>
+#include "orion5x.h"
+#include "bridge-regs.h"
 #include "common.h"
 
 static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {

diff --git a/arch/arm/mach-orion5x/board-mss2.c b/arch/arm/mach-orion5x/board-mss2.c
index 66f9c3b..79202fd 100644 (file)
--- a/arch/arm/mach-orion5x/board-mss2.c
+++ b/arch/arm/mach-orion5x/board-mss2.c
@@ -17,8 +17,8 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
-#include <mach/bridge-regs.h>
+#include "orion5x.h"
+#include "bridge-regs.h"
 #include "common.h"
 
 /*****************************************************************************

diff --git a/arch/arm/mach-orion5x/board-rd88f5182.c b/arch/arm/mach-orion5x/board-rd88f5182.c
index 270824b..b7b0f52 100644 (file)
--- a/arch/arm/mach-orion5x/board-rd88f5182.c
+++ b/arch/arm/mach-orion5x/board-rd88f5182.c
@@ -18,8 +18,8 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * RD-88F5182 Info

diff --git a/arch/arm/mach-orion5x/bridge-regs.h b/arch/arm/mach-orion5x/bridge-regs.h
new file mode 100644 (file)
index 0000000..305598e
--- /dev/null
+++ b/arch/arm/mach-orion5x/bridge-regs.h
@@ -0,0 +1,35 @@
+/*
+ * Orion CPU Bridge Registers
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_BRIDGE_REGS_H
+#define __ASM_ARCH_BRIDGE_REGS_H
+
+#include "orion5x.h"
+
+#define CPU_CONF               (ORION5X_BRIDGE_VIRT_BASE + 0x100)
+
+#define CPU_CTRL               (ORION5X_BRIDGE_VIRT_BASE + 0x104)
+
+#define RSTOUTn_MASK           (ORION5X_BRIDGE_VIRT_BASE + 0x108)
+#define RSTOUTn_MASK_PHYS      (ORION5X_BRIDGE_PHYS_BASE + 0x108)
+
+#define CPU_SOFT_RESET         (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
+
+#define BRIDGE_CAUSE           (ORION5X_BRIDGE_VIRT_BASE + 0x110)
+
+#define POWER_MNG_CTRL_REG     (ORION5X_BRIDGE_VIRT_BASE + 0x11C)
+
+#define BRIDGE_INT_TIMER1_CLR  (~0x0004)
+
+#define MAIN_IRQ_CAUSE         (ORION5X_BRIDGE_VIRT_BASE + 0x200)
+
+#define MAIN_IRQ_MASK          (ORION5X_BRIDGE_VIRT_BASE + 0x204)
+
+#define TIMER_VIRT_BASE                (ORION5X_BRIDGE_VIRT_BASE + 0x300)
+#define TIMER_PHYS_BASE                (ORION5X_BRIDGE_PHYS_BASE + 0x300)
+#endif

diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 2b7889e..70c3366 100644 (file)
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -27,14 +27,14 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <mach/bridge-regs.h>
-#include <mach/hardware.h>
-#include <mach/orion5x.h>
 #include <linux/platform_data/mtd-orion_nand.h>
 #include <linux/platform_data/usb-ehci-orion.h>
 #include <plat/time.h>
 #include <plat/common.h>
+
+#include "bridge-regs.h"
 #include "common.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * I/O Address Mapping

diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 698528f..12f74b4 100644 (file)
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -23,10 +23,10 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include <linux/platform_data/mtd-orion_nand.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * DB-88F5281 on board devices

diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 96a8c50..cd483bf 100644 (file)
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -33,8 +33,8 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <asm/system_info.h>
-#include <mach/orion5x.h>
 #include <plat/orion-gpio.h>
+#include "orion5x.h"
 #include "common.h"
 #include "mpp.h"
 

diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
deleted file mode 100644 (file)
index 5766e3f..0000000
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/bridge-regs.h
- *
- * Orion CPU Bridge Registers
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_BRIDGE_REGS_H
-#define __ASM_ARCH_BRIDGE_REGS_H
-
-#include <mach/orion5x.h>
-
-#define CPU_CONF               (ORION5X_BRIDGE_VIRT_BASE + 0x100)
-
-#define CPU_CTRL               (ORION5X_BRIDGE_VIRT_BASE + 0x104)
-
-#define RSTOUTn_MASK           (ORION5X_BRIDGE_VIRT_BASE + 0x108)
-#define RSTOUTn_MASK_PHYS      (ORION5X_BRIDGE_PHYS_BASE + 0x108)
-
-#define CPU_SOFT_RESET         (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
-
-#define BRIDGE_CAUSE           (ORION5X_BRIDGE_VIRT_BASE + 0x110)
-
-#define POWER_MNG_CTRL_REG     (ORION5X_BRIDGE_VIRT_BASE + 0x11C)
-
-#define BRIDGE_INT_TIMER1_CLR  (~0x0004)
-
-#define MAIN_IRQ_CAUSE         (ORION5X_BRIDGE_VIRT_BASE + 0x200)
-
-#define MAIN_IRQ_MASK          (ORION5X_BRIDGE_VIRT_BASE + 0x204)
-
-#define TIMER_VIRT_BASE                (ORION5X_BRIDGE_VIRT_BASE + 0x300)
-#define TIMER_PHYS_BASE                (ORION5X_BRIDGE_PHYS_BASE + 0x300)
-#endif

diff --git a/arch/arm/mach-orion5x/include/mach/hardware.h b/arch/arm/mach-orion5x/include/mach/hardware.h
deleted file mode 100644 (file)
index 3957354..0000000
--- a/arch/arm/mach-orion5x/include/mach/hardware.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/hardware.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include "orion5x.h"
-
-#endif

diff --git a/arch/arm/mach-orion5x/include/mach/irqs.h b/arch/arm/mach-orion5x/include/mach/irqs.h
deleted file mode 100644 (file)
index 4b8703c..0000000
--- a/arch/arm/mach-orion5x/include/mach/irqs.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/irqs.h
- *
- * IRQ definitions for Orion SoC
- *
- *  Maintainer: Tzachi Perelstein <tzachi@marvell.com>
- *
- *  This file is licensed under the terms of the GNU General Public
- *  License version 2. This program is licensed "as is" without any
- *  warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H
-
-/*
- * Orion Main Interrupt Controller
- */
-#define IRQ_ORION5X_BRIDGE             (1 + 0)
-#define IRQ_ORION5X_DOORBELL_H2C       (1 + 1)
-#define IRQ_ORION5X_DOORBELL_C2H       (1 + 2)
-#define IRQ_ORION5X_UART0              (1 + 3)
-#define IRQ_ORION5X_UART1              (1 + 4)
-#define IRQ_ORION5X_I2C                        (1 + 5)
-#define IRQ_ORION5X_GPIO_0_7           (1 + 6)
-#define IRQ_ORION5X_GPIO_8_15          (1 + 7)
-#define IRQ_ORION5X_GPIO_16_23         (1 + 8)
-#define IRQ_ORION5X_GPIO_24_31         (1 + 9)
-#define IRQ_ORION5X_PCIE0_ERR          (1 + 10)
-#define IRQ_ORION5X_PCIE0_INT          (1 + 11)
-#define IRQ_ORION5X_USB1_CTRL          (1 + 12)
-#define IRQ_ORION5X_DEV_BUS_ERR                (1 + 14)
-#define IRQ_ORION5X_PCI_ERR            (1 + 15)
-#define IRQ_ORION5X_USB_BR_ERR         (1 + 16)
-#define IRQ_ORION5X_USB0_CTRL          (1 + 17)
-#define IRQ_ORION5X_ETH_RX             (1 + 18)
-#define IRQ_ORION5X_ETH_TX             (1 + 19)
-#define IRQ_ORION5X_ETH_MISC           (1 + 20)
-#define IRQ_ORION5X_ETH_SUM            (1 + 21)
-#define IRQ_ORION5X_ETH_ERR            (1 + 22)
-#define IRQ_ORION5X_IDMA_ERR           (1 + 23)
-#define IRQ_ORION5X_IDMA_0             (1 + 24)
-#define IRQ_ORION5X_IDMA_1             (1 + 25)
-#define IRQ_ORION5X_IDMA_2             (1 + 26)
-#define IRQ_ORION5X_IDMA_3             (1 + 27)
-#define IRQ_ORION5X_CESA               (1 + 28)
-#define IRQ_ORION5X_SATA               (1 + 29)
-#define IRQ_ORION5X_XOR0               (1 + 30)
-#define IRQ_ORION5X_XOR1               (1 + 31)
-
-/*
- * Orion General Purpose Pins
- */
-#define IRQ_ORION5X_GPIO_START 33
-#define NR_GPIO_IRQS           32
-
-#define ORION5X_NR_IRQS                (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
-
-
-#endif

diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
deleted file mode 100644 (file)
index 7be7c2e..0000000
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/orion5x.h
- *
- * Generic definitions of Orion SoC flavors:
- *  Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90.
- *
- * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_ORION5X_H
-#define __ASM_ARCH_ORION5X_H
-
-#include <mach/irqs.h>
-
-/*****************************************************************************
- * Orion Address Maps
- *
- * phys
- * e0000000    PCIe MEM space
- * e8000000    PCI MEM space
- * f0000000    PCIe WA space (Orion-1/Orion-NAS only)
- * f1000000    on-chip peripheral registers
- * f2000000    PCIe I/O space
- * f2100000    PCI I/O space
- * f2200000    SRAM dedicated for the crypto unit
- * f4000000    device bus mappings (boot)
- * fa000000    device bus mappings (cs0)
- * fa800000    device bus mappings (cs2)
- * fc000000    device bus mappings (cs0/cs1)
- *
- * virt                phys            size
- * fe000000    f1000000        1M      on-chip peripheral registers
- * fee00000    f2000000        64K     PCIe I/O space
- * fee10000    f2100000        64K     PCI I/O space
- * fd000000    f0000000        16M     PCIe WA space (Orion-1/Orion-NAS only)
- ****************************************************************************/
-#define ORION5X_REGS_PHYS_BASE         0xf1000000
-#define ORION5X_REGS_VIRT_BASE         IOMEM(0xfe000000)
-#define ORION5X_REGS_SIZE              SZ_1M
-
-#define ORION5X_PCIE_IO_PHYS_BASE      0xf2000000
-#define ORION5X_PCIE_IO_BUS_BASE       0x00000000
-#define ORION5X_PCIE_IO_SIZE           SZ_64K
-
-#define ORION5X_PCI_IO_PHYS_BASE       0xf2100000
-#define ORION5X_PCI_IO_BUS_BASE                0x00010000
-#define ORION5X_PCI_IO_SIZE            SZ_64K
-
-#define ORION5X_SRAM_PHYS_BASE         (0xf2200000)
-#define ORION5X_SRAM_SIZE              SZ_8K
-
-/* Relevant only for Orion-1/Orion-NAS */
-#define ORION5X_PCIE_WA_PHYS_BASE      0xf0000000
-#define ORION5X_PCIE_WA_VIRT_BASE      IOMEM(0xfd000000)
-#define ORION5X_PCIE_WA_SIZE           SZ_16M
-
-#define ORION5X_PCIE_MEM_PHYS_BASE     0xe0000000
-#define ORION5X_PCIE_MEM_SIZE          SZ_128M
-
-#define ORION5X_PCI_MEM_PHYS_BASE      0xe8000000
-#define ORION5X_PCI_MEM_SIZE           SZ_128M
-
-/*******************************************************************************
- * Orion Registers Map
- ******************************************************************************/
-
-#define ORION5X_DDR_PHYS_BASE           (ORION5X_REGS_PHYS_BASE + 0x00000)
-#define  ORION5X_DDR_WINS_BASE          (ORION5X_DDR_PHYS_BASE + 0x1500)
-#define  ORION5X_DDR_WINS_SZ            (0x10)
-#define ORION5X_DDR_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x00000)
-#define ORION5X_DEV_BUS_PHYS_BASE      (ORION5X_REGS_PHYS_BASE + 0x10000)
-#define ORION5X_DEV_BUS_VIRT_BASE      (ORION5X_REGS_VIRT_BASE + 0x10000)
-#define ORION5X_DEV_BUS_REG(x)         (ORION5X_DEV_BUS_VIRT_BASE + (x))
-#define  GPIO_VIRT_BASE                        ORION5X_DEV_BUS_REG(0x0100)
-#define  SPI_PHYS_BASE                 (ORION5X_DEV_BUS_PHYS_BASE + 0x0600)
-#define  I2C_PHYS_BASE                 (ORION5X_DEV_BUS_PHYS_BASE + 0x1000)
-#define  UART0_PHYS_BASE               (ORION5X_DEV_BUS_PHYS_BASE + 0x2000)
-#define  UART0_VIRT_BASE               (ORION5X_DEV_BUS_VIRT_BASE + 0x2000)
-#define  UART1_PHYS_BASE               (ORION5X_DEV_BUS_PHYS_BASE + 0x2100)
-#define  UART1_VIRT_BASE               (ORION5X_DEV_BUS_VIRT_BASE + 0x2100)
-
-#define ORION5X_BRIDGE_VIRT_BASE       (ORION5X_REGS_VIRT_BASE + 0x20000)
-#define ORION5X_BRIDGE_PHYS_BASE       (ORION5X_REGS_PHYS_BASE + 0x20000)
-#define  ORION5X_BRIDGE_WINS_BASE       (ORION5X_BRIDGE_PHYS_BASE)
-#define  ORION5X_BRIDGE_WINS_SZ         (0x80)
-
-#define ORION5X_PCI_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x30000)
-
-#define ORION5X_PCIE_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0x40000)
-
-#define ORION5X_USB0_PHYS_BASE         (ORION5X_REGS_PHYS_BASE + 0x50000)
-#define ORION5X_USB0_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0x50000)
-
-#define ORION5X_XOR_PHYS_BASE          (ORION5X_REGS_PHYS_BASE + 0x60900)
-#define ORION5X_XOR_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x60900)
-
-#define ORION5X_ETH_PHYS_BASE          (ORION5X_REGS_PHYS_BASE + 0x70000)
-#define ORION5X_ETH_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x70000)
-
-#define ORION5X_SATA_PHYS_BASE         (ORION5X_REGS_PHYS_BASE + 0x80000)
-#define ORION5X_SATA_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0x80000)
-
-#define ORION5X_CRYPTO_PHYS_BASE       (ORION5X_REGS_PHYS_BASE + 0x90000)
-
-#define ORION5X_USB1_PHYS_BASE         (ORION5X_REGS_PHYS_BASE + 0xa0000)
-#define ORION5X_USB1_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0xa0000)
-
-/*******************************************************************************
- * Device Bus Registers
- ******************************************************************************/
-#define MPP_0_7_CTRL           ORION5X_DEV_BUS_REG(0x000)
-#define MPP_8_15_CTRL          ORION5X_DEV_BUS_REG(0x004)
-#define MPP_16_19_CTRL         ORION5X_DEV_BUS_REG(0x050)
-#define MPP_DEV_CTRL           ORION5X_DEV_BUS_REG(0x008)
-#define MPP_RESET_SAMPLE       ORION5X_DEV_BUS_REG(0x010)
-#define DEV_BANK_0_PARAM       ORION5X_DEV_BUS_REG(0x45c)
-#define DEV_BANK_1_PARAM       ORION5X_DEV_BUS_REG(0x460)
-#define DEV_BANK_2_PARAM       ORION5X_DEV_BUS_REG(0x464)
-#define DEV_BANK_BOOT_PARAM    ORION5X_DEV_BUS_REG(0x46c)
-#define DEV_BUS_CTRL           ORION5X_DEV_BUS_REG(0x4c0)
-#define DEV_BUS_INT_CAUSE      ORION5X_DEV_BUS_REG(0x4d0)
-#define DEV_BUS_INT_MASK       ORION5X_DEV_BUS_REG(0x4d4)
-
-/*******************************************************************************
- * Supported Devices & Revisions
- ******************************************************************************/
-/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */
-#define MV88F5181_DEV_ID       0x5181
-#define MV88F5181_REV_B1       3
-#define MV88F5181L_REV_A0      8
-#define MV88F5181L_REV_A1      9
-/* Orion-NAS (88F5182) */
-#define MV88F5182_DEV_ID       0x5182
-#define MV88F5182_REV_A2       2
-/* Orion-2 (88F5281) */
-#define MV88F5281_DEV_ID       0x5281
-#define MV88F5281_REV_D0       4
-#define MV88F5281_REV_D1       5
-#define MV88F5281_REV_D2       6
-/* Orion-1-90 (88F6183) */
-#define MV88F6183_DEV_ID       0x6183
-#define MV88F6183_REV_B0       3
-
-#endif

diff --git a/arch/arm/mach-orion5x/include/mach/uncompress.h b/arch/arm/mach-orion5x/include/mach/uncompress.h
index abd26b5..25e5cb9 100644 (file)
--- a/arch/arm/mach-orion5x/include/mach/uncompress.h
+++ b/arch/arm/mach-orion5x/include/mach/uncompress.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/mach-orion5x/include/mach/uncompress.h
- *
  * Tzachi Perelstein <tzachi@marvell.com>
  *
  * This file is licensed under the terms of the GNU General Public
@@ -9,8 +7,8 @@
  */
 
 #include <linux/serial_reg.h>
-#include <mach/orion5x.h>
 
+#define UART0_PHYS_BASE (0xf1000000 + 0x12000)
 #define SERIAL_BASE    ((unsigned char *)UART0_PHYS_BASE)
 
 static void putc(const char c)

diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index 8678db1..de980ef 100644 (file)
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -13,10 +13,10 @@
 #include <linux/kernel.h>
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <mach/bridge-regs.h>
 #include <plat/orion-gpio.h>
 #include <plat/irq.h>
 #include <asm/exception.h>
+#include "bridge-regs.h"
 #include "common.h"
 
 static int __initdata gpio0_irqs[4] = {

diff --git a/arch/arm/mach-orion5x/irqs.h b/arch/arm/mach-orion5x/irqs.h
new file mode 100644 (file)
index 0000000..506c8e0
--- /dev/null
+++ b/arch/arm/mach-orion5x/irqs.h
@@ -0,0 +1,58 @@
+/*
+ * IRQ definitions for Orion SoC
+ *
+ *  Maintainer: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ *  This file is licensed under the terms of the GNU General Public
+ *  License version 2. This program is licensed "as is" without any
+ *  warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+/*
+ * Orion Main Interrupt Controller
+ */
+#define IRQ_ORION5X_BRIDGE             (1 + 0)
+#define IRQ_ORION5X_DOORBELL_H2C       (1 + 1)
+#define IRQ_ORION5X_DOORBELL_C2H       (1 + 2)
+#define IRQ_ORION5X_UART0              (1 + 3)
+#define IRQ_ORION5X_UART1              (1 + 4)
+#define IRQ_ORION5X_I2C                        (1 + 5)
+#define IRQ_ORION5X_GPIO_0_7           (1 + 6)
+#define IRQ_ORION5X_GPIO_8_15          (1 + 7)
+#define IRQ_ORION5X_GPIO_16_23         (1 + 8)
+#define IRQ_ORION5X_GPIO_24_31         (1 + 9)
+#define IRQ_ORION5X_PCIE0_ERR          (1 + 10)
+#define IRQ_ORION5X_PCIE0_INT          (1 + 11)
+#define IRQ_ORION5X_USB1_CTRL          (1 + 12)
+#define IRQ_ORION5X_DEV_BUS_ERR                (1 + 14)
+#define IRQ_ORION5X_PCI_ERR            (1 + 15)
+#define IRQ_ORION5X_USB_BR_ERR         (1 + 16)
+#define IRQ_ORION5X_USB0_CTRL          (1 + 17)
+#define IRQ_ORION5X_ETH_RX             (1 + 18)
+#define IRQ_ORION5X_ETH_TX             (1 + 19)
+#define IRQ_ORION5X_ETH_MISC           (1 + 20)
+#define IRQ_ORION5X_ETH_SUM            (1 + 21)
+#define IRQ_ORION5X_ETH_ERR            (1 + 22)
+#define IRQ_ORION5X_IDMA_ERR           (1 + 23)
+#define IRQ_ORION5X_IDMA_0             (1 + 24)
+#define IRQ_ORION5X_IDMA_1             (1 + 25)
+#define IRQ_ORION5X_IDMA_2             (1 + 26)
+#define IRQ_ORION5X_IDMA_3             (1 + 27)
+#define IRQ_ORION5X_CESA               (1 + 28)
+#define IRQ_ORION5X_SATA               (1 + 29)
+#define IRQ_ORION5X_XOR0               (1 + 30)
+#define IRQ_ORION5X_XOR1               (1 + 31)
+
+/*
+ * Orion General Purpose Pins
+ */
+#define IRQ_ORION5X_GPIO_START 33
+#define NR_GPIO_IRQS           32
+
+#define ORION5X_NR_IRQS                (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
+
+
+#endif

diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index b1ebb37..9dc3f59 100644 (file)
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -23,10 +23,10 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include <linux/platform_data/mtd-orion_nand.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * KUROBOX-PRO Info

diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index cb8720e..dfdaa8a 100644 (file)
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -22,9 +22,9 @@
 #include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * Linkstation LS-CHL Info

diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index 0ddfa23..47ba6e0 100644 (file)
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -21,9 +21,9 @@
 #include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * Linkstation LS-HGL Info

diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index 5b70026..19ef185 100644 (file)
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -11,8 +11,8 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
 #include <plat/mpp.h>
+#include "orion5x.h"
 #include "mpp.h"
 #include "common.h"
 

diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 11985dc..2bf8ec7 100644 (file)
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -21,9 +21,9 @@
 #include <linux/ata_platform.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 #define MV2120_NOR_BOOT_BASE   0xf4000000
 #define MV2120_NOR_BOOT_SIZE   SZ_512K

diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index e91abcc..bf6be4c 100644 (file)
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -24,10 +24,10 @@
 #include <linux/delay.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/orion5x.h>
 #include <plat/orion-gpio.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * LaCie 2Big Network Info

diff --git a/arch/arm/mach-orion5x/orion5x.h b/arch/arm/mach-orion5x/orion5x.h
new file mode 100644 (file)
index 0000000..3364df3
--- /dev/null
+++ b/arch/arm/mach-orion5x/orion5x.h
@@ -0,0 +1,146 @@
+/*
+ * Generic definitions of Orion SoC flavors:
+ *  Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90.
+ *
+ * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_ORION5X_H
+#define __ASM_ARCH_ORION5X_H
+
+#include "irqs.h"
+
+/*****************************************************************************
+ * Orion Address Maps
+ *
+ * phys
+ * e0000000    PCIe MEM space
+ * e8000000    PCI MEM space
+ * f0000000    PCIe WA space (Orion-1/Orion-NAS only)
+ * f1000000    on-chip peripheral registers
+ * f2000000    PCIe I/O space
+ * f2100000    PCI I/O space
+ * f2200000    SRAM dedicated for the crypto unit
+ * f4000000    device bus mappings (boot)
+ * fa000000    device bus mappings (cs0)
+ * fa800000    device bus mappings (cs2)
+ * fc000000    device bus mappings (cs0/cs1)
+ *
+ * virt                phys            size
+ * fe000000    f1000000        1M      on-chip peripheral registers
+ * fee00000    f2000000        64K     PCIe I/O space
+ * fee10000    f2100000        64K     PCI I/O space
+ * fd000000    f0000000        16M     PCIe WA space (Orion-1/Orion-NAS only)
+ ****************************************************************************/
+#define ORION5X_REGS_PHYS_BASE         0xf1000000
+#define ORION5X_REGS_VIRT_BASE         IOMEM(0xfe000000)
+#define ORION5X_REGS_SIZE              SZ_1M
+
+#define ORION5X_PCIE_IO_PHYS_BASE      0xf2000000
+#define ORION5X_PCIE_IO_BUS_BASE       0x00000000
+#define ORION5X_PCIE_IO_SIZE           SZ_64K
+
+#define ORION5X_PCI_IO_PHYS_BASE       0xf2100000
+#define ORION5X_PCI_IO_BUS_BASE                0x00010000
+#define ORION5X_PCI_IO_SIZE            SZ_64K
+
+#define ORION5X_SRAM_PHYS_BASE         (0xf2200000)
+#define ORION5X_SRAM_SIZE              SZ_8K
+
+/* Relevant only for Orion-1/Orion-NAS */
+#define ORION5X_PCIE_WA_PHYS_BASE      0xf0000000
+#define ORION5X_PCIE_WA_VIRT_BASE      IOMEM(0xfd000000)
+#define ORION5X_PCIE_WA_SIZE           SZ_16M
+
+#define ORION5X_PCIE_MEM_PHYS_BASE     0xe0000000
+#define ORION5X_PCIE_MEM_SIZE          SZ_128M
+
+#define ORION5X_PCI_MEM_PHYS_BASE      0xe8000000
+#define ORION5X_PCI_MEM_SIZE           SZ_128M
+
+/*******************************************************************************
+ * Orion Registers Map
+ ******************************************************************************/
+
+#define ORION5X_DDR_PHYS_BASE           (ORION5X_REGS_PHYS_BASE + 0x00000)
+#define  ORION5X_DDR_WINS_BASE          (ORION5X_DDR_PHYS_BASE + 0x1500)
+#define  ORION5X_DDR_WINS_SZ            (0x10)
+#define ORION5X_DDR_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x00000)
+#define ORION5X_DEV_BUS_PHYS_BASE      (ORION5X_REGS_PHYS_BASE + 0x10000)
+#define ORION5X_DEV_BUS_VIRT_BASE      (ORION5X_REGS_VIRT_BASE + 0x10000)
+#define ORION5X_DEV_BUS_REG(x)         (ORION5X_DEV_BUS_VIRT_BASE + (x))
+#define  GPIO_VIRT_BASE                        ORION5X_DEV_BUS_REG(0x0100)
+#define  SPI_PHYS_BASE                 (ORION5X_DEV_BUS_PHYS_BASE + 0x0600)
+#define  I2C_PHYS_BASE                 (ORION5X_DEV_BUS_PHYS_BASE + 0x1000)
+#define  UART0_PHYS_BASE               (ORION5X_DEV_BUS_PHYS_BASE + 0x2000)
+#define  UART0_VIRT_BASE               (ORION5X_DEV_BUS_VIRT_BASE + 0x2000)
+#define  UART1_PHYS_BASE               (ORION5X_DEV_BUS_PHYS_BASE + 0x2100)
+#define  UART1_VIRT_BASE               (ORION5X_DEV_BUS_VIRT_BASE + 0x2100)
+
+#define ORION5X_BRIDGE_VIRT_BASE       (ORION5X_REGS_VIRT_BASE + 0x20000)
+#define ORION5X_BRIDGE_PHYS_BASE       (ORION5X_REGS_PHYS_BASE + 0x20000)
+#define  ORION5X_BRIDGE_WINS_BASE       (ORION5X_BRIDGE_PHYS_BASE)
+#define  ORION5X_BRIDGE_WINS_SZ         (0x80)
+
+#define ORION5X_PCI_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x30000)
+
+#define ORION5X_PCIE_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0x40000)
+
+#define ORION5X_USB0_PHYS_BASE         (ORION5X_REGS_PHYS_BASE + 0x50000)
+#define ORION5X_USB0_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0x50000)
+
+#define ORION5X_XOR_PHYS_BASE          (ORION5X_REGS_PHYS_BASE + 0x60900)
+#define ORION5X_XOR_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x60900)
+
+#define ORION5X_ETH_PHYS_BASE          (ORION5X_REGS_PHYS_BASE + 0x70000)
+#define ORION5X_ETH_VIRT_BASE          (ORION5X_REGS_VIRT_BASE + 0x70000)
+
+#define ORION5X_SATA_PHYS_BASE         (ORION5X_REGS_PHYS_BASE + 0x80000)
+#define ORION5X_SATA_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0x80000)
+
+#define ORION5X_CRYPTO_PHYS_BASE       (ORION5X_REGS_PHYS_BASE + 0x90000)
+
+#define ORION5X_USB1_PHYS_BASE         (ORION5X_REGS_PHYS_BASE + 0xa0000)
+#define ORION5X_USB1_VIRT_BASE         (ORION5X_REGS_VIRT_BASE + 0xa0000)
+
+/*******************************************************************************
+ * Device Bus Registers
+ ******************************************************************************/
+#define MPP_0_7_CTRL           ORION5X_DEV_BUS_REG(0x000)
+#define MPP_8_15_CTRL          ORION5X_DEV_BUS_REG(0x004)
+#define MPP_16_19_CTRL         ORION5X_DEV_BUS_REG(0x050)
+#define MPP_DEV_CTRL           ORION5X_DEV_BUS_REG(0x008)
+#define MPP_RESET_SAMPLE       ORION5X_DEV_BUS_REG(0x010)
+#define DEV_BANK_0_PARAM       ORION5X_DEV_BUS_REG(0x45c)
+#define DEV_BANK_1_PARAM       ORION5X_DEV_BUS_REG(0x460)
+#define DEV_BANK_2_PARAM       ORION5X_DEV_BUS_REG(0x464)
+#define DEV_BANK_BOOT_PARAM    ORION5X_DEV_BUS_REG(0x46c)
+#define DEV_BUS_CTRL           ORION5X_DEV_BUS_REG(0x4c0)
+#define DEV_BUS_INT_CAUSE      ORION5X_DEV_BUS_REG(0x4d0)
+#define DEV_BUS_INT_MASK       ORION5X_DEV_BUS_REG(0x4d4)
+
+/*******************************************************************************
+ * Supported Devices & Revisions
+ ******************************************************************************/
+/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */
+#define MV88F5181_DEV_ID       0x5181
+#define MV88F5181_REV_B1       3
+#define MV88F5181L_REV_A0      8
+#define MV88F5181L_REV_A1      9
+/* Orion-NAS (88F5182) */
+#define MV88F5182_DEV_ID       0x5182
+#define MV88F5182_REV_A2       2
+/* Orion-2 (88F5281) */
+#define MV88F5281_DEV_ID       0x5281
+#define MV88F5281_REV_D0       4
+#define MV88F5281_REV_D1       5
+#define MV88F5281_REV_D2       6
+/* Orion-1-90 (88F6183) */
+#define MV88F6183_DEV_ID       0x6183
+#define MV88F6183_REV_B0       3
+
+#endif

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index b02f394..ecb998e 100644 (file)
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -19,8 +19,8 @@
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
 #include <plat/addr-map.h>
-#include <mach/orion5x.h>
 #include "common.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * Orion has one PCIe controller and one PCI controller.

diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 69a6e5b..c742e7b 100644 (file)
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -20,9 +20,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * RD-88F5181L FXO Info

diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index e19f8b7..7e977b7 100644 (file)
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -21,9 +21,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * RD-88F5181L GE Info

diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 180a4f9..fe3e67c 100644 (file)
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -23,9 +23,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * RD-88F5182 Info

diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index cc5bdbe..4bf80dd 100644 (file)
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -22,8 +22,8 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
+#include "orion5x.h"
 
 static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
        .phy_addr       = -1,

diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index ad20575..deb5e29 100644 (file)
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -22,9 +22,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 
 /*****************************************************************************
  * Terastation Pro 2/Live Info

diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 1cfc364..7bd671b 100644 (file)
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -25,9 +25,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 #include "tsx09-common.h"
 
 #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000

diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index bc985cf..a77613b 100644 (file)
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -27,9 +27,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 #include "tsx09-common.h"
 
 /*****************************************************************************

diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 5a61a66..b67ace4 100644 (file)
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -23,9 +23,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "orion5x.h"
 #include "ts78xx-fpga.h"
 
 /*****************************************************************************

diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c
index d42e006..8977498 100644 (file)
--- a/arch/arm/mach-orion5x/tsx09-common.c
+++ b/arch/arm/mach-orion5x/tsx09-common.c
@@ -15,7 +15,7 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/timex.h>
 #include <linux/serial_reg.h>
-#include <mach/orion5x.h>
+#include "orion5x.h"
 #include "tsx09-common.h"
 #include "common.h"
 

diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index bcc6e12..4e1e5c8 100644 (file)
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -19,7 +19,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
+#include "orion5x.h"
 #include "common.h"
 #include "mpp.h"
 

diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index 4068d7a..61e9027 100644 (file)
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -22,7 +22,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
-#include <mach/orion5x.h>
+#include "orion5x.h"
 #include "common.h"
 #include "mpp.h"