ASoC: qcom: Add four speaker support on MI2S secondary
authorSrinivasa Rao Mandadapu <srivasam@codeaurora.org>
Wed, 9 Jun 2021 13:30:39 +0000 (19:00 +0530)
committerMark Brown <broonie@kernel.org>
Mon, 14 Jun 2021 14:01:05 +0000 (15:01 +0100)
Add four speaker support on MI2S secondary block
by using I2S SD1 line on gpio52 pin, and add channel map
control support in the lpass-cpu audio driver.

Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210609133039.4648-1-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/qcom/lpass-cpu.c
sound/soc/qcom/lpass-sc7180.c
sound/soc/qcom/lpass.h

index 28c7497..98f9324 100644 (file)
 #define LPASS_CPU_I2S_SD0_1_2_MASK     GENMASK(2, 0)
 #define LPASS_CPU_I2S_SD0_1_2_3_MASK   GENMASK(3, 0)
 
+/*
+ * Channel maps for Quad channel playbacks on MI2S Secondary
+ */
+static struct snd_pcm_chmap_elem lpass_quad_chmaps[] = {
+               { .channels = 4,
+                 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_RL,
+                               SNDRV_CHMAP_FR, SNDRV_CHMAP_RR } },
+               { }
+};
 static int lpass_cpu_init_i2sctl_bitfields(struct device *dev,
                        struct lpaif_i2sctl *i2sctl, struct regmap *map)
 {
@@ -324,6 +333,25 @@ const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops = {
 };
 EXPORT_SYMBOL_GPL(asoc_qcom_lpass_cpu_dai_ops);
 
+int lpass_cpu_pcm_new(struct snd_soc_pcm_runtime *rtd,
+                               struct snd_soc_dai *dai)
+{
+       int ret;
+       struct snd_soc_dai_driver *drv = dai->driver;
+       struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+
+       if (drvdata->mi2s_playback_sd_mode[dai->id] == LPAIF_I2SCTL_MODE_QUAD01) {
+               ret =  snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
+                               lpass_quad_chmaps, drv->playback.channels_max, 0,
+                               NULL);
+               if (ret < 0)
+                       return ret;
+       }
+
+       return 0;
+}
+EXPORT_SYMBOL_GPL(lpass_cpu_pcm_new);
+
 int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai)
 {
        struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
@@ -846,6 +874,11 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
                                PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));
                        return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]);
                }
+               if (drvdata->mi2s_playback_sd_mode[dai_id] ==
+                       LPAIF_I2SCTL_MODE_QUAD01) {
+                       variant->dai_driver[dai_id].playback.channels_min = 4;
+                       variant->dai_driver[dai_id].playback.channels_max = 4;
+               }
        }
 
        /* Allocation for i2sctl regmap fields */
index 8c168d3..77a556b 100644 (file)
@@ -58,6 +58,7 @@ static struct snd_soc_dai_driver sc7180_lpass_cpu_dai_driver[] = {
                },
                .probe  = &asoc_qcom_lpass_cpu_dai_probe,
                .ops    = &asoc_qcom_lpass_cpu_dai_ops,
+               .pcm_new = lpass_cpu_pcm_new,
        }, {
                .id = LPASS_DP_RX,
                .name = "Hdmi",
index 83b2e08..623ddcc 100644 (file)
@@ -259,5 +259,7 @@ void asoc_qcom_lpass_cpu_platform_shutdown(struct platform_device *pdev);
 int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
 int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
 extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;
+int lpass_cpu_pcm_new(struct snd_soc_pcm_runtime *rtd,
+                               struct snd_soc_dai *dai);
 
 #endif /* __LPASS_H__ */