octeontx2-af: update cpt lf alloc mailbox

The CN10K CPT coprocessor contains a context processor
to accelerate updates to the IPsec security association
contexts. The context processor contains a context cache.
This patch updates CPT LF ALLOC mailbox to config ctx_ilen
requested by VFs. CPT_LF_ALLOC:ctx_ilen is the size of
initial context fetch.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index b121e3d..e2ae9c3 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -1610,6 +1610,8 @@ struct cpt_lf_alloc_req_msg {
        u16 sso_pf_func;
        u16 eng_grpmsk;
        int blkaddr;
+       u8 ctx_ilen_valid : 1;
+       u8 ctx_ilen : 7;
 };
 
 #define CPT_INLINE_INBOUND      0

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
index 302ff54..d7ca7e9 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
@@ -17,7 +17,7 @@
 #define        PCI_DEVID_OTX2_CPT10K_PF 0xA0F2
 
 /* Length of initial context fetch in 128 byte words */
-#define CPT_CTX_ILEN    2ULL
+#define CPT_CTX_ILEN    1ULL
 
 #define cpt_get_eng_sts(e_min, e_max, rsp, etype)                   \
 ({                                                                  \
@@ -421,8 +421,12 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu,
 
                /* Set CPT LF group and priority */
                val = (u64)req->eng_grpmsk << 48 | 1;
-               if (!is_rvu_otx2(rvu))
-                       val |= (CPT_CTX_ILEN << 17);
+               if (!is_rvu_otx2(rvu)) {
+                       if (req->ctx_ilen_valid)
+                               val |= (req->ctx_ilen << 17);
+                       else
+                               val |= (CPT_CTX_ILEN << 17);
+               }
 
                rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);