drm/amdgpu: fix AGP init order
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 7 Nov 2023 19:07:44 +0000 (14:07 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 9 Nov 2023 21:59:46 +0000 (16:59 -0500)
The default AGP settings were overwriting the IP selected
ones since the default was getting set after the IP ones
were selected.

Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP")
Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html
Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 0dcb6c3..cef920a 100644 (file)
@@ -1062,9 +1062,6 @@ static const char * const amdgpu_vram_names[] = {
  */
 int amdgpu_bo_init(struct amdgpu_device *adev)
 {
-       /* set the default AGP aperture state */
-       amdgpu_gmc_set_agp_default(adev, &adev->gmc);
-
        /* On A+A platform, VRAM can be mapped as WB */
        if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) {
                /* reserve PAT memory space to WC for VRAM */
index d8a4fdd..ef80ea0 100644 (file)
@@ -672,6 +672,7 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev,
        /* add the xgmi offset of the physical node */
        base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
 
+       amdgpu_gmc_set_agp_default(adev, mc);
        amdgpu_gmc_vram_location(adev, &adev->gmc, base);
        amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);
        if (!amdgpu_sriov_vf(adev))
index 4713a62..5f794a9 100644 (file)
@@ -637,6 +637,7 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
 
        base = adev->mmhub.funcs->get_fb_location(adev);
 
+       amdgpu_gmc_set_agp_default(adev, mc);
        amdgpu_gmc_vram_location(adev, &adev->gmc, base);
        amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_HIGH);
        if (!amdgpu_sriov_vf(adev) ||
index 7f66954..42e103d 100644 (file)
@@ -211,6 +211,7 @@ static void gmc_v6_0_vram_gtt_location(struct amdgpu_device *adev,
 
        base <<= 24;
 
+       amdgpu_gmc_set_agp_default(adev, mc);
        amdgpu_gmc_vram_location(adev, mc, base);
        amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);
 }
index 61ca1a8..efc16e5 100644 (file)
@@ -239,6 +239,7 @@ static void gmc_v7_0_vram_gtt_location(struct amdgpu_device *adev,
 
        base <<= 24;
 
+       amdgpu_gmc_set_agp_default(adev, mc);
        amdgpu_gmc_vram_location(adev, mc, base);
        amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);
 }
index fa59749..ff4ae73 100644 (file)
@@ -413,6 +413,7 @@ static void gmc_v8_0_vram_gtt_location(struct amdgpu_device *adev,
                base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF;
        base <<= 24;
 
+       amdgpu_gmc_set_agp_default(adev, mc);
        amdgpu_gmc_vram_location(adev, mc, base);
        amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);
 }
index b66c5f7..fe52d13 100644 (file)
@@ -1614,6 +1614,8 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
 {
        u64 base = adev->mmhub.funcs->get_fb_location(adev);
 
+       amdgpu_gmc_set_agp_default(adev, mc);
+
        /* add the xgmi offset of the physical node */
        base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
        if (adev->gmc.xgmi.connected_to_cpu) {