drm/amd/display: Drop unnecessary DCN guards

[Why]
DM is littered with DCN guards leading to frequent
breakages on non-DCN builds when new code is added.

[How]
Remove all guards that are not needed.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index de270f0..26abb62 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -5737,7 +5737,6 @@ static bool is_freesync_video_mode(const struct drm_display_mode *mode,
                return true;
 }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
 static void update_dsc_caps(struct amdgpu_dm_connector *aconnector,
                            struct dc_sink *sink, struct dc_stream_state *stream,
                            struct dsc_dec_dpcd_caps *dsc_caps)
@@ -5892,7 +5891,6 @@ static void apply_dsc_policy_for_stream(struct amdgpu_dm_connector *aconnector,
        if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_bits_per_pixel)
                stream->timing.dsc_cfg.bits_per_pixel = aconnector->dsc_settings.dsc_bits_per_pixel;
 }
-#endif /* CONFIG_DRM_AMD_DC_DCN */
 
 static struct dc_stream_state *
 create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
@@ -5915,9 +5913,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
        int mode_refresh;
        int preferred_refresh = 0;
        enum color_transfer_func tf = TRANSFER_FUNC_UNKNOWN;
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        struct dsc_dec_dpcd_caps dsc_caps;
-#endif
 
        struct dc_sink *sink = NULL;
 
@@ -6016,12 +6012,10 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                stream->timing = *aconnector->timing_requested;
        }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        /* SST DSC determination policy */
        update_dsc_caps(aconnector, sink, stream, &dsc_caps);
        if (aconnector->dsc_settings.dsc_force_enable != DSC_CLK_FORCE_DISABLE && dsc_caps.is_dsc_supported)
                apply_dsc_policy_for_stream(aconnector, sink, stream, &dsc_caps);
-#endif
 
        update_stream_scaling_settings(&mode, dm_state, stream);
 
@@ -6747,7 +6741,6 @@ const struct drm_encoder_helper_funcs amdgpu_dm_encoder_helper_funcs = {
        .atomic_check = dm_encoder_helper_atomic_check
 };
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
 static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
                                            struct dc_state *dc_state,
                                            struct dsc_mst_fairness_vars *vars)
@@ -6821,7 +6814,6 @@ static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
        }
        return 0;
 }
-#endif
 
 static int to_drm_connector_type(enum signal_type st)
 {
@@ -9758,7 +9750,6 @@ static int dm_check_crtc_cursor(struct drm_atomic_state *state,
        return 0;
 }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
 static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm_crtc *crtc)
 {
        struct drm_connector *connector;
@@ -9784,7 +9775,6 @@ static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm
 
        return drm_dp_mst_add_affected_dsc_crtcs(state, &aconnector->mst_root->mst_mgr);
 }
-#endif
 
 /**
  * amdgpu_dm_atomic_check() - Atomic check implementation for AMDgpu DM.
@@ -9828,11 +9818,9 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
        bool lock_and_validation_needed = false;
        bool is_top_most_overlay = true;
        struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state;
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        struct drm_dp_mst_topology_mgr *mgr;
        struct drm_dp_mst_topology_state *mst_state;
        struct dsc_mst_fairness_vars vars[MAX_PIPES];
-#endif
 
        trace_amdgpu_dm_atomic_check_begin(state);
 
@@ -9863,7 +9851,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                        new_crtc_state->connectors_changed = true;
        }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        if (dc_resource_is_dsc_encoding_supported(dc)) {
                for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
                        if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
@@ -9875,7 +9862,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                        }
                }
        }
-#endif
        for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
                dm_old_crtc_state = to_dm_crtc_state(old_crtc_state);
 
@@ -10013,13 +9999,11 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                }
        }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        if (dc_resource_is_dsc_encoding_supported(dc)) {
                ret = pre_validate_dsc(state, &dm_state, vars);
                if (ret != 0)
                        goto fail;
        }
-#endif
 
        /* Run this here since we want to validate the streams we created */
        ret = drm_atomic_helper_check_planes(dev, state);
@@ -10085,7 +10069,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                lock_and_validation_needed = true;
        }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        /* set the slot info for each mst_state based on the link encoding format */
        for_each_new_mst_mgr_in_state(state, mgr, mst_state, i) {
                struct amdgpu_dm_connector *aconnector;
@@ -10105,7 +10088,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                }
                drm_connector_list_iter_end(&iter);
        }
-#endif
 
        /**
         * Streams and planes are reset when there are changes that affect
@@ -10133,7 +10115,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                        goto fail;
                }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
                ret = compute_mst_dsc_configs_for_state(state, dm_state->context, vars);
                if (ret) {
                        DRM_DEBUG_DRIVER("compute_mst_dsc_configs_for_state() failed\n");
@@ -10145,7 +10126,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                        DRM_DEBUG_DRIVER("dm_update_mst_vcpi_slots_for_dsc() failed\n");
                        goto fail;
                }
-#endif
 
                /*
                 * Perform validation of MST topology in the state:

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 1583157..1be04c6 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -525,7 +525,6 @@ bool dm_helpers_submit_i2c(
        return result;
 }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
 static bool execute_synaptics_rc_command(struct drm_dp_aux *aux,
                bool is_write_cmd,
                unsigned char cmd,
@@ -693,7 +692,6 @@ static uint8_t write_dsc_enable_synaptics_non_virtual_dpcd_mst(
 
        return ret;
 }
-#endif
 
 bool dm_helpers_dp_write_dsc_enable(
                struct dc_context *ctx,
@@ -719,13 +717,11 @@ bool dm_helpers_dp_write_dsc_enable(
                if (!aconnector->dsc_aux)
                        return false;
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
                // apply w/a to synaptics
                if (needs_dsc_aux_workaround(aconnector->dc_link) &&
                    (aconnector->mst_downstream_port_present.byte & 0x7) != 0x3)
                        return write_dsc_enable_synaptics_non_virtual_dpcd_mst(
                                aconnector->dsc_aux, stream, enable_dsc);
-#endif
 
                port = aconnector->mst_output_port;
 
@@ -763,17 +759,13 @@ bool dm_helpers_dp_write_dsc_enable(
        }
 
        if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT || stream->signal == SIGNAL_TYPE_EDP) {
-#if defined(CONFIG_DRM_AMD_DC_DCN)
                if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) {
-#endif
                        ret = dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);
                        DC_LOG_DC("Send DSC %s to SST RX\n", enable_dsc ? "enable" : "disable");
-#if defined(CONFIG_DRM_AMD_DC_DCN)
                } else if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) {
                        ret = dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);
                        DC_LOG_DC("Send DSC %s to DP-HDMI PCON\n", enable_dsc ? "enable" : "disable");
                }
-#endif
        }
 
        return ret;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 248f259..2739bef 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -198,7 +198,6 @@ static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
        .early_unregister = amdgpu_dm_mst_connector_early_unregister,
 };
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
 bool needs_dsc_aux_workaround(struct dc_link *link)
 {
        if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
@@ -268,7 +267,6 @@ static bool retrieve_downstream_port_device(struct amdgpu_dm_connector *aconnect
 
        return true;
 }
-#endif
 
 static int dm_dp_mst_get_modes(struct drm_connector *connector)
 {
@@ -375,7 +373,6 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector)
                        amdgpu_dm_update_freesync_caps(
                                        connector, aconnector->edid);
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
                        if (!validate_dsc_caps_on_connector(aconnector))
                                memset(&aconnector->dc_sink->dsc_caps,
                                       0, sizeof(aconnector->dc_sink->dsc_caps));
@@ -383,7 +380,6 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector)
                        if (!retrieve_downstream_port_device(aconnector))
                                memset(&aconnector->mst_downstream_port_present,
                                        0, sizeof(aconnector->mst_downstream_port_present));
-#endif
                }
        }
 
@@ -642,8 +638,6 @@ int dm_mst_get_pbn_divider(struct dc_link *link)
                        dc_link_get_link_cap(link)) / (8 * 1000 * 54);
 }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN)
-
 struct dsc_mst_fairness_params {
        struct dc_crtc_timing *timing;
        struct dc_sink *sink;
@@ -1427,7 +1421,6 @@ static unsigned int kbps_from_pbn(unsigned int pbn)
 static bool is_dsc_common_config_possible(struct dc_stream_state *stream,
                                          struct dc_dsc_bw_range *bw_range)
 {
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        struct dc_dsc_policy dsc_policy = {0};
 
        dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy);
@@ -1439,17 +1432,13 @@ static bool is_dsc_common_config_possible(struct dc_stream_state *stream,
                                       &stream->timing, bw_range);
 
        return bw_range->max_target_bpp_x16 && bw_range->min_target_bpp_x16;
-#endif
-       return false;
 }
-#endif /* CONFIG_DRM_AMD_DC_DCN */
 
 enum dc_status dm_dp_mst_is_port_support_mode(
        struct amdgpu_dm_connector *aconnector,
        struct dc_stream_state *stream)
 {
        int bpp, pbn, branch_max_throughput_mps = 0;
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        struct dc_link_settings cur_link_settings;
        unsigned int end_to_end_bw_in_kbps = 0;
        unsigned int upper_link_bw_in_kbps = 0, down_link_bw_in_kbps = 0;
@@ -1491,16 +1480,13 @@ enum dc_status dm_dp_mst_is_port_support_mode(
                        return DC_FAIL_BANDWIDTH_VALIDATE;
                }
        } else {
-#endif
                /* check if mode could be supported within full_pbn */
                bpp = convert_dc_color_depth_into_bpc(stream->timing.display_color_depth) * 3;
                pbn = drm_dp_calc_pbn_mode(stream->timing.pix_clk_100hz / 10, bpp, false);
 
                if (pbn > aconnector->mst_output_port->full_pbn)
                        return DC_FAIL_BANDWIDTH_VALIDATE;
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        }
-#endif
 
        /* check is mst dsc output bandwidth branch_overall_throughput_0_mps */
        switch (stream->timing.pixel_encoding) {