mxser: simplify FCR computation in mxser_change_speed()
authorJiri Slaby <jslaby@suse.cz>
Wed, 22 Sep 2021 07:59:35 +0000 (09:59 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 5 Oct 2021 12:08:09 +0000 (14:08 +0200)
Provided FIFO is always enabled for MUST chips, move its FCR setting out
of PORT_8250/PORT_16450 special case in mxser_change_speed(). Now, we
can pre-set fcr to zero and invert the condition of the 'if'.

This makes the code more readable (no functional change intended).

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Link: https://lore.kernel.org/r/20210922075938.31390-4-jslaby@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/mxser.c

index 309acf3..c194a96 100644 (file)
@@ -600,33 +600,26 @@ static void mxser_change_speed(struct tty_struct *tty, struct ktermios *old_term
        if (cflag & CMSPAR)
                cval |= UART_LCR_SPAR;
 
-       if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
-               if (info->board->must_hwid) {
-                       fcr = UART_FCR_ENABLE_FIFO;
-                       fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
-                       mxser_set_must_fifo_value(info);
-               } else
-                       fcr = 0;
-       } else {
-               fcr = UART_FCR_ENABLE_FIFO;
-               if (info->board->must_hwid) {
-                       fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
-                       mxser_set_must_fifo_value(info);
-               } else {
-                       switch (info->rx_high_water) {
-                       case 1:
-                               fcr |= UART_FCR_TRIGGER_1;
-                               break;
-                       case 4:
-                               fcr |= UART_FCR_TRIGGER_4;
-                               break;
-                       case 8:
-                               fcr |= UART_FCR_TRIGGER_8;
-                               break;
-                       default:
-                               fcr |= UART_FCR_TRIGGER_14;
-                               break;
-                       }
+       fcr = 0;
+       if (info->board->must_hwid) {
+               fcr |= UART_FCR_ENABLE_FIFO |
+                       MOXA_MUST_FCR_GDA_MODE_ENABLE;
+               mxser_set_must_fifo_value(info);
+       } else if (info->type != PORT_8250 && info->type != PORT_16450) {
+               fcr |= UART_FCR_ENABLE_FIFO;
+               switch (info->rx_high_water) {
+               case 1:
+                       fcr |= UART_FCR_TRIGGER_1;
+                       break;
+               case 4:
+                       fcr |= UART_FCR_TRIGGER_4;
+                       break;
+               case 8:
+                       fcr |= UART_FCR_TRIGGER_8;
+                       break;
+               default:
+                       fcr |= UART_FCR_TRIGGER_14;
+                       break;
                }
        }