drm/i915/adl_p: ADL_P device info enabling
authorClinton Taylor <Clinton.A.Taylor@intel.com>
Thu, 6 May 2021 16:19:23 +0000 (19:19 +0300)
committerImre Deak <imre.deak@intel.com>
Fri, 7 May 2021 07:51:42 +0000 (10:51 +0300)
Add ADL-P to the device_info table and support MACROS.

Bspec: 49185, 55372, 55373
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-4-imre.deak@intel.com
arch/x86/kernel/early-quirks.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c
drivers/gpu/drm/i915/intel_device_info.h

index 6edd1e2..b553ffe 100644 (file)
@@ -552,6 +552,7 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
        INTEL_TGL_12_IDS(&gen11_early_ops),
        INTEL_RKL_IDS(&gen11_early_ops),
        INTEL_ADLS_IDS(&gen11_early_ops),
+       INTEL_ADLP_IDS(&gen11_early_ops),
 };
 
 struct resource intel_graphics_stolen_res __ro_after_init = DEFINE_RES_MEM(0, 0);
index e20294e..e5513e1 100644 (file)
@@ -1392,6 +1392,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_ROCKETLAKE(dev_priv)        IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE)
 #define IS_DG1(dev_priv)        IS_PLATFORM(dev_priv, INTEL_DG1)
 #define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S)
+#define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
                                    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev_priv) \
index 1417e26..1fd1b48 100644 (file)
@@ -949,6 +949,17 @@ static const struct intel_device_info adl_s_info = {
        .dbuf.size = 4096,                                              \
        .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4)
 
+static const struct intel_device_info adl_p_info = {
+       GEN12_FEATURES,
+       XE_LPD_FEATURES,
+       PLATFORM(INTEL_ALDERLAKE_P),
+       .require_force_probe = 1,
+       .platform_engine_mask =
+               BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
+       .ppgtt_size = 48,
+       .dma_mask_size = 39,
+};
+
 #undef GEN
 #undef PLATFORM
 
@@ -1026,6 +1037,7 @@ static const struct pci_device_id pciidlist[] = {
        INTEL_TGL_12_IDS(&tgl_info),
        INTEL_RKL_IDS(&rkl_info),
        INTEL_ADLS_IDS(&adl_s_info),
+       INTEL_ADLP_IDS(&adl_p_info),
        {0, 0, 0}
 };
 MODULE_DEVICE_TABLE(pci, pciidlist);
index 6a351a7..3b975ce 100644 (file)
@@ -67,6 +67,7 @@ static const char * const platform_names[] = {
        PLATFORM_NAME(ROCKETLAKE),
        PLATFORM_NAME(DG1),
        PLATFORM_NAME(ALDERLAKE_S),
+       PLATFORM_NAME(ALDERLAKE_P),
 };
 #undef PLATFORM_NAME
 
index 6aefe4f..e98b369 100644 (file)
@@ -87,6 +87,7 @@ enum intel_platform {
        INTEL_ROCKETLAKE,
        INTEL_DG1,
        INTEL_ALDERLAKE_S,
+       INTEL_ALDERLAKE_P,
        INTEL_MAX_PLATFORMS
 };