ARM: dts: stm32: Add alternate pinmux for DCMI pins

Add another mux option for DCMI pins, this is used on AV96 board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index 214563a..94db065 100644 (file)
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -151,6 +151,43 @@
                };
        };
 
+       dcmi_pins_c: dcmi-2 {
+               pins {
+                       pinmux = <STM32_PINMUX('A', 4,  AF13)>,/* DCMI_HSYNC */
+                                <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
+                                <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
+                                <STM32_PINMUX('A', 9,  AF13)>,/* DCMI_D0 */
+                                <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
+                                <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */
+                                <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
+                                <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
+                                <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
+                                <STM32_PINMUX('I', 6,  AF13)>,/* DCMI_D6 */
+                                <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
+                                <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
+                                <STM32_PINMUX('H', 7,  AF13)>;/* DCMI_D9 */
+                       bias-pull-up;
+               };
+       };
+
+       dcmi_sleep_pins_c: dcmi-sleep-2 {
+               pins {
+                       pinmux = <STM32_PINMUX('A', 4,  ANALOG)>,/* DCMI_HSYNC */
+                                <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
+                                <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
+                                <STM32_PINMUX('A', 9,  ANALOG)>,/* DCMI_D0 */
+                                <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
+                                <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */
+                                <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
+                                <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
+                                <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
+                                <STM32_PINMUX('I', 6,  ANALOG)>,/* DCMI_D6 */
+                                <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
+                                <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
+                                <STM32_PINMUX('H', 7,  ANALOG)>;/* DCMI_D9 */
+               };
+       };
+
        ethernet0_rgmii_pins_a: rgmii-0 {
                pins1 {
                        pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */