drm/xe: Rename RC0/RC6 macros
authorLucas De Marchi <lucas.demarchi@intel.com>
Wed, 12 Apr 2023 23:28:44 +0000 (16:28 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:31:43 +0000 (18:31 -0500)
Follow up commits will mass-remove the gen prefix/suffix. For GEN6_RC0
and GEN6_RC6 that would make the variable too short and easy to
conflict. So, add "GT_" prefix that is also part of the register name.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_gt_regs.h
drivers/gpu/drm/xe/xe_guc_pc.c

index c1d73f3..fb91f04 100644 (file)
 
 #define GEN6_GT_CORE_STATUS                    _MMIO(0x138060)
 #define   RCN_MASK                             REG_GENMASK(2, 0)
-#define   GEN6_RC0                             0
-#define   GEN6_RC6                             3
+#define   GT_RC0                               0
+#define   GT_RC6                               3
 
 #define GEN6_GT_GFX_RC6_LOCKED                 _MMIO(0x138104)
 #define GEN6_GT_GFX_RC6                                _MMIO(0x138108)
index b853831..0b6d057 100644 (file)
@@ -592,9 +592,9 @@ static ssize_t rc_status_show(struct device *dev,
        xe_device_mem_access_put(gt_to_xe(gt));
 
        switch (REG_FIELD_GET(RCN_MASK, reg)) {
-       case GEN6_RC6:
+       case GT_RC6:
                return sysfs_emit(buff, "rc6\n");
-       case GEN6_RC0:
+       case GT_RC0:
                return sysfs_emit(buff, "rc0\n");
        default:
                return -ENOENT;