drm/amdgpu: call flush_gpu_tlb directly in gfxhub enable
authorYunxiang Li <Yunxiang.Li@amd.com>
Tue, 4 Jun 2024 16:56:56 +0000 (12:56 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Jun 2024 20:15:59 +0000 (16:15 -0400)
Here since we are in reset and takes the reset_domain write side lock
already. We can't use the flush tlb helper which tries to take the read
side.

Signed-off-by: Yunxiang Li <Yunxiang.Li@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

index 603c073..6605998 100644 (file)
@@ -620,10 +620,8 @@ void amdgpu_gmc_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
        int r;
 
        if (!hub->sdma_invalidation_workaround || vmid ||
-           !adev->mman.buffer_funcs_enabled ||
-           !adev->ib_pool_ready || amdgpu_in_reset(adev) ||
+           !adev->mman.buffer_funcs_enabled || !adev->ib_pool_ready ||
            !ring->sched.ready) {
-
                /*
                 * A GPU reset should flush all TLBs anyway, so no need to do
                 * this while one is ongoing.
index 19d9545..2a51035 100644 (file)
@@ -4415,7 +4415,9 @@ static int gfx_v11_0_gfxhub_enable(struct amdgpu_device *adev)
                false : true;
 
        adev->gfxhub.funcs->set_fault_enable_default(adev, value);
-       amdgpu_gmc_flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(0), 0);
+       /* TODO investigate why this and the hdp flush above is needed,
+        * are we missing a flush somewhere else? */
+       adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(0), 0);
 
        return 0;
 }
index 6419f98..460bf33 100644 (file)
@@ -3192,7 +3192,9 @@ static int gfx_v12_0_gfxhub_enable(struct amdgpu_device *adev)
                false : true;
 
        adev->gfxhub.funcs->set_fault_enable_default(adev, value);
-       amdgpu_gmc_flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(0), 0);
+       /* TODO investigate why this and the hdp flush above is needed,
+        * are we missing a flush somewhere else? */
+       adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(0), 0);
 
        return 0;
 }