Merge branch 'remotes/lorenzo/pci/dwc'

  - Simplify computation of msix_tbl (Jiri Slaby)

  - Make hisi_pcie_platform_ops static (Zou Wei)

  - Warn about resources above 4G (Alan Mikhak)

  - Make intel_pcie_cpu_addr() static (Jason Yan)

  - Use devm_platform_ioremap_resource_byname() to simplify code and
    improve error checking (Wei Yongjun)

  - Fix inner MSI IRQ domain registration so it doesn't confuse debugfs
    (Marc Zyngier)

  - Don't use FAST_LINK_MODE on meson (Marc Zyngier)

  - Add Socionext UniPhier Pro5 PCIe endpoint controller driver and DT
    description (Kunihiko Hayashi)

* remotes/lorenzo/pci/dwc:
  PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver
  dt-bindings: PCI: Add UniPhier PCIe endpoint controller description
  PCI: dwc: Use private data pointer of "struct irq_domain" to get pcie_port
  PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link
  PCI: dwc: Fix inner MSI IRQ domain registration
  PCI: dwc: pci-dra7xx: Use devm_platform_ioremap_resource_byname()
  PCI: dwc: intel: Make intel_pcie_cpu_addr() static
  PCI: dwc: Program outbound ATU upper limit register
  PCI: dwc: Make hisi_pcie_platform_ops static
  PCI: dwc: Clean up computing of msix_tbl

diff --combined drivers/pci/controller/dwc/Kconfig
index ce13fd6,426ef5c..044a376
--- 1/drivers/pci/controller/dwc/Kconfig
--- 2/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@@ -26,7 -26,7 +26,7 @@@ config PCI_DRA7XX_HOS
        depends on OF && HAS_IOMEM && TI_PIPE3
        select PCIE_DW_HOST
        select PCI_DRA7XX
 -      default y
 +      default y if SOC_DRA7XX
        help
          Enables support for the PCIe controller in the DRA7xx SoC to work in
          host mode. There are two instances of PCIe controller in DRA7xx.
@@@ -111,6 -111,7 +111,6 @@@ config PCI_KEYSTONE_HOS
        depends on PCI_MSI_IRQ_DOMAIN
        select PCIE_DW_HOST
        select PCI_KEYSTONE
 -      default y
        help
          Enables support for the PCIe controller in the Keystone SoC to
          work in host mode. The PCI controller on Keystone is based on
@@@ -280,15 -281,25 +280,25 @@@ config PCIE_TEGRA194_E
          selected. This uses the DesignWare core.
  
  config PCIE_UNIPHIER
-       bool "Socionext UniPhier PCIe controllers"
+       bool "Socionext UniPhier PCIe host controllers"
        depends on ARCH_UNIPHIER || COMPILE_TEST
        depends on OF && HAS_IOMEM
        depends on PCI_MSI_IRQ_DOMAIN
        select PCIE_DW_HOST
        help
-         Say Y here if you want PCIe controller support on UniPhier SoCs.
+         Say Y here if you want PCIe host controller support on UniPhier SoCs.
          This driver supports LD20 and PXs3 SoCs.
  
+ config PCIE_UNIPHIER_EP
+       bool "Socionext UniPhier PCIe endpoint controllers"
+       depends on ARCH_UNIPHIER || COMPILE_TEST
+       depends on OF && HAS_IOMEM
+       depends on PCI_ENDPOINT
+       select PCIE_DW_EP
+       help
+         Say Y here if you want PCIe endpoint controller support on
+         UniPhier SoCs. This driver supports Pro5 SoC.
+ 
  config PCIE_AL
        bool "Amazon Annapurna Labs PCIe controller"
        depends on OF && (ARM64 || COMPILE_TEST)