drm/nouveau/mmu/gp100-: enable mmu invalidate depth optimisation
authorBen Skeggs <bskeggs@redhat.com>
Wed, 10 Jun 2020 04:46:01 +0000 (14:46 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 24 Jul 2020 08:50:47 +0000 (18:50 +1000)
This causes us to invalidate MMU only at the level we made modifications -
ie: if we've only modified PTEs, there's no need to have MMU dump the PDs
it's fetched into L2.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c

index d862875..97520e9 100644 (file)
@@ -466,7 +466,6 @@ void
 gp100_vmm_flush(struct nvkm_vmm *vmm, int depth)
 {
        u32 type = (5 /* CACHE_LEVEL_UP_TO_PDE3 */ - depth) << 24;
-       type = 0; /*XXX: need to confirm stuff works with depth enabled... */
        if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR]))
                type |= 0x00000004; /* HUB_ONLY */
        type |= 0x00000001; /* PAGE_ALL */
index be91cff..b1294d0 100644 (file)
@@ -28,9 +28,9 @@ tu102_vmm_flush(struct nvkm_vmm *vmm, int depth)
 {
        struct nvkm_subdev *subdev = &vmm->mmu->subdev;
        struct nvkm_device *device = subdev->device;
-       u32 type = depth << 24; /*XXX: not confirmed */
+       u32 type = (5 /* CACHE_LEVEL_UP_TO_PDE3 */ - depth) << 24;
 
-       type = 0x00000001; /* PAGE_ALL */
+       type |= 0x00000001; /* PAGE_ALL */
        if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR]))
                type |= 0x00000004; /* HUB_ONLY */