drm/i915: Fix wrong condition in bxt_set_cdclk for DG2
authorStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Sat, 6 May 2023 14:42:17 +0000 (17:42 +0300)
committerStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Mon, 8 May 2023 09:21:35 +0000 (12:21 +0300)
By my own mistake, after adding !IS_DG2 into wrong branch,
bxt_set_cdclk started to execute code intended for platforms
gen < 11, which is wrong.
Move IS_DG2 check to better place.

Fixes: ceb0cc3b4288 ("drm/i915: Communicate display power demands to pcode")
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230506144217.26075-1-stanislav.lisovskiy@intel.com
drivers/gpu/drm/i915/display/intel_cdclk.c

index a11092d..6bed75f 100644 (file)
@@ -1896,9 +1896,9 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
         * mailbox communication, skip
         * this step.
         */
-       if (DISPLAY_VER(dev_priv) >= 14)
+       if (DISPLAY_VER(dev_priv) >= 14 || IS_DG2(dev_priv))
                /* NOOP */;
-       else if (DISPLAY_VER(dev_priv) >= 11 && !IS_DG2(dev_priv))
+       else if (DISPLAY_VER(dev_priv) >= 11)
                ret = skl_pcode_request(&dev_priv->uncore, SKL_PCODE_CDCLK_CONTROL,
                                        SKL_CDCLK_PREPARE_FOR_CHANGE,
                                        SKL_CDCLK_READY_FOR_CHANGE,