drm/amd/display: Add DCE_VERSION_12_1 enum for Vega 20
authorLeo Li <sunpeng.li@amd.com>
Wed, 31 Oct 2018 20:56:54 +0000 (16:56 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Dec 2018 22:39:49 +0000 (17:39 -0500)
[Why]
We'll need a way to differentiate Vega 20 in DC

[How]
Add a DCE_VERSION_12_1 enum, which will be returned as the DC version if
the ASIC used is a Vega 20.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c
drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c
drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c
drivers/gpu/drm/amd/display/include/dal_types.h

index 65b006a..8196f3b 100644 (file)
@@ -67,6 +67,7 @@ bool dal_bios_parser_init_cmd_tbl_helper2(
                return true;
 #endif
        case DCE_VERSION_12_0:
+       case DCE_VERSION_12_1:
                *h = dal_cmd_tbl_helper_dce112_get_table2();
                return true;
 
index c347afd..76137df 100644 (file)
@@ -83,7 +83,10 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
                        dc_version = DCE_VERSION_11_22;
                break;
        case FAMILY_AI:
-               dc_version = DCE_VERSION_12_0;
+               if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev))
+                       dc_version = DCE_VERSION_12_1;
+               else
+                       dc_version = DCE_VERSION_12_0;
                break;
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
        case FAMILY_RV:
@@ -136,6 +139,7 @@ struct resource_pool *dc_create_resource_pool(
                        num_virtual_links, dc);
                break;
        case DCE_VERSION_12_0:
+       case DCE_VERSION_12_1:
                res_pool = dce120_create_resource_pool(
                        num_virtual_links, dc);
                break;
index a683f41..c2028c4 100644 (file)
@@ -79,6 +79,7 @@ bool dal_hw_factory_init(
                dal_hw_factory_dce110_init(factory);
                return true;
        case DCE_VERSION_12_0:
+       case DCE_VERSION_12_1:
                dal_hw_factory_dce120_init(factory);
                return true;
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
index 096f456..236ca28 100644 (file)
@@ -76,6 +76,7 @@ bool dal_hw_translate_init(
                dal_hw_translate_dce110_init(translate);
                return true;
        case DCE_VERSION_12_0:
+       case DCE_VERSION_12_1:
                dal_hw_translate_dce120_init(translate);
                return true;
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
index e56093f..1ad6e49 100644 (file)
@@ -90,6 +90,7 @@ struct i2caux *dal_i2caux_create(
        case DCE_VERSION_10_0:
                return dal_i2caux_dce100_create(ctx);
        case DCE_VERSION_12_0:
+       case DCE_VERSION_12_1:
                return dal_i2caux_dce120_create(ctx);
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
        case DCN_VERSION_1_0:
index 8962713..f5bd869 100644 (file)
@@ -42,6 +42,7 @@ enum dce_version {
        DCE_VERSION_11_2,
        DCE_VERSION_11_22,
        DCE_VERSION_12_0,
+       DCE_VERSION_12_1,
        DCE_VERSION_MAX,
        DCN_VERSION_1_0,
 #if defined(CONFIG_DRM_AMD_DC_DCN1_01)