drm/etnaviv: print MMU exception cause

The MMU tells us the fault status. While the raw register value is
already printed, it's a bit more user friendly to translate the
fault reasons into human readable format.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index a639cc9..415f622 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -1454,6 +1454,15 @@ static void sync_point_worker(struct work_struct *work)
 
 static void dump_mmu_fault(struct etnaviv_gpu *gpu)
 {
+       static const char *fault_reasons[] = {
+               "slave not present",
+               "page not present",
+               "write violation",
+               "out of bounds",
+               "read security violation",
+               "write security violation",
+       };
+
        u32 status_reg, status;
        int i;
 
@@ -1466,18 +1475,25 @@ static void dump_mmu_fault(struct etnaviv_gpu *gpu)
        dev_err_ratelimited(gpu->dev, "MMU fault status 0x%08x\n", status);
 
        for (i = 0; i < 4; i++) {
+               const char *reason = "unknown";
                u32 address_reg;
+               u32 mmu_status;
 
-               if (!(status & (VIVS_MMUv2_STATUS_EXCEPTION0__MASK << (i * 4))))
+               mmu_status = (status >> (i * 4)) & VIVS_MMUv2_STATUS_EXCEPTION0__MASK;
+               if (!mmu_status)
                        continue;
 
+               if ((mmu_status - 1) < ARRAY_SIZE(fault_reasons))
+                       reason = fault_reasons[mmu_status - 1];
+
                if (gpu->sec_mode == ETNA_SEC_NONE)
                        address_reg = VIVS_MMUv2_EXCEPTION_ADDR(i);
                else
                        address_reg = VIVS_MMUv2_SEC_EXCEPTION_ADDR;
 
-               dev_err_ratelimited(gpu->dev, "MMU %d fault addr 0x%08x\n", i,
-                                   gpu_read(gpu, address_reg));
+               dev_err_ratelimited(gpu->dev,
+                                   "MMU %d fault (%s) addr 0x%08x\n",
+                                   i, reason, gpu_read(gpu, address_reg));
        }
 }